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70527a680b
0, but use this mechanism to generate interrupts. Preserve the child device when setting up and tearing down interrupts. Some style nits.
1257 lines
36 KiB
C
1257 lines
36 KiB
C
/*
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* Copyright (c) 1999, 2000 Matthew R. Green
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* All rights reserved.
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* Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: psycho.c,v 1.35 2001/09/10 16:17:06 eeh Exp
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*
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* $FreeBSD$
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*/
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/*
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* Support for `psycho' and `psycho+' UPA to PCI bridge and
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* UltraSPARC IIi and IIe `sabre' PCI controllers.
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*/
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#include "opt_psycho.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <ofw/openfirm.h>
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#include <ofw/ofw_pci.h>
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#include <machine/bus.h>
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#include <machine/cache.h>
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#include <machine/iommureg.h>
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#include <machine/bus_common.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/nexusvar.h>
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#include <machine/ofw_upa.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <machine/iommuvar.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <sparc64/pci/ofw_pci.h>
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#include <sparc64/pci/psychoreg.h>
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#include <sparc64/pci/psychovar.h>
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#include "pcib_if.h"
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#include "sparcbus_if.h"
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static void psycho_get_ranges(phandle_t, struct upa_ranges **, int *);
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static void psycho_set_intr(struct psycho_softc *, int, device_t, u_long *,
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int, driver_intr_t);
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static int psycho_find_intrmap(struct psycho_softc *, int, u_long **,
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u_long **, u_long *);
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static void psycho_intr_stub(void *);
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#ifdef PSYCHO_STRAY
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static void psycho_intr_stray(void *);
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#endif
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static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int);
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/* Interrupt handlers */
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static void psycho_ue(void *);
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static void psycho_ce(void *);
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static void psycho_bus_a(void *);
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static void psycho_bus_b(void *);
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static void psycho_powerfail(void *);
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#ifdef PSYCHO_MAP_WAKEUP
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static void psycho_wakeup(void *);
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#endif
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/* IOMMU support */
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static void psycho_iommu_init(struct psycho_softc *, int);
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/*
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* bus space and bus dma support for UltraSPARC `psycho'. note that most
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* of the bus dma support is provided by the iommu dvma controller.
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*/
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static int psycho_dmamem_alloc(bus_dma_tag_t, void **, int, bus_dmamap_t *);
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static void psycho_dmamem_free(bus_dma_tag_t, void *, bus_dmamap_t);
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static int psycho_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
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bus_dmamap_callback_t *, void *, int);
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static void psycho_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
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static void psycho_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t);
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/*
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* autoconfiguration
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*/
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static int psycho_probe(device_t);
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static int psycho_attach(device_t);
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static int psycho_read_ivar(device_t, device_t, int, u_long *);
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static int psycho_setup_intr(device_t, device_t, struct resource *, int,
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driver_intr_t *, void *, void **);
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static int psycho_teardown_intr(device_t, device_t, struct resource *, void *);
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static struct resource *psycho_alloc_resource(device_t, device_t, int, int *,
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u_long, u_long, u_long, u_int);
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static int psycho_activate_resource(device_t, device_t, int, int,
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struct resource *);
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static int psycho_deactivate_resource(device_t, device_t, int, int,
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struct resource *);
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static int psycho_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int psycho_maxslots(device_t);
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static u_int32_t psycho_read_config(device_t, u_int, u_int, u_int, u_int, int);
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static void psycho_write_config(device_t, u_int, u_int, u_int, u_int, u_int32_t,
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int);
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static int psycho_route_interrupt(device_t, device_t, int);
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static int psycho_intr_pending(device_t, int);
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static bus_space_handle_t psycho_get_bus_handle(device_t dev, enum sbbt_id id,
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bus_space_handle_t childhdl, bus_space_tag_t *tag);
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static device_method_t psycho_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, psycho_probe),
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DEVMETHOD(device_attach, psycho_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, psycho_read_ivar),
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DEVMETHOD(bus_setup_intr, psycho_setup_intr),
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DEVMETHOD(bus_teardown_intr, psycho_teardown_intr),
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DEVMETHOD(bus_alloc_resource, psycho_alloc_resource),
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DEVMETHOD(bus_activate_resource, psycho_activate_resource),
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DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource),
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DEVMETHOD(bus_release_resource, psycho_release_resource),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, psycho_maxslots),
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DEVMETHOD(pcib_read_config, psycho_read_config),
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DEVMETHOD(pcib_write_config, psycho_write_config),
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DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt),
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/* sparcbus interface */
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DEVMETHOD(sparcbus_intr_pending, psycho_intr_pending),
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DEVMETHOD(sparcbus_get_bus_handle, psycho_get_bus_handle),
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{ 0, 0 }
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};
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static driver_t psycho_driver = {
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"pcib",
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psycho_methods,
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sizeof(struct psycho_softc),
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};
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static devclass_t psycho_devclass;
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DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0);
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static int psycho_ndevs;
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static struct psycho_softc *psycho_softcs[4];
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struct psycho_clr {
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u_long *pci_clr; /* clear register */
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driver_intr_t *pci_handler; /* handler to call */
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void *pci_arg; /* argument for the handler */
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void *pci_cookie; /* interrupt cookie of parent bus */
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};
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/*
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* "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a
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* single PCI bus and does not have a streaming buffer. It often has an APB
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* (advanced PCI bridge) connected to it, which was designed specifically for
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* the IIi. The APB let's the IIi handle two independednt PCI buses, and
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* appears as two "simba"'s underneath the sabre.
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*
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* "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus
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* and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while
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* "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You
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* will usually find a "psycho+" since I don't think the original "psycho"
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* ever shipped, and if it did it would be in the U30.
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*
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* Each "psycho" PCI bus appears as a separate OFW node, but since they are
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* both part of the same IC, they only have a single register space. As such,
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* they need to be configured together, even though the autoconfiguration will
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* attach them separately.
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*
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* On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often
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* as pci1 and pci2, although they have been implemented with other PCI bus
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* numbers on some machines.
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*
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* On UltraII machines, there can be any number of "psycho+" ICs, each
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* providing two PCI buses.
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*
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*
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* XXXX The psycho/sabre node has an `interrupts' attribute. They contain
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* the values of the following interrupts in this order:
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*
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* PCI Bus Error (30)
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* DMA UE (2e)
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* DMA CE (2f)
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* Power Fail (25)
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*
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* We really should attach handlers for each.
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*/
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#define OFW_PCI_TYPE "pci"
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#define OFW_SABRE_MODEL "SUNW,sabre"
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#define OFW_SABRE_COMPAT "pci108e,a001"
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#define OFW_SIMBA_MODEL "SUNW,simba"
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#define OFW_PSYCHO_MODEL "SUNW,psycho"
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static int
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psycho_probe(device_t dev)
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{
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phandle_t node;
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char *dtype, *model;
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static char compat[32];
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node = nexus_get_node(dev);
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if (OF_getprop(node, "compatible", compat, sizeof(compat)) == -1)
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compat[0] = '\0';
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dtype = nexus_get_device_type(dev);
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model = nexus_get_model(dev);
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/* match on a type of "pci" and a sabre or a psycho */
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if (nexus_get_reg(dev) != NULL && dtype != NULL &&
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strcmp(dtype, OFW_PCI_TYPE) == 0 &&
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((model != NULL && (strcmp(model, OFW_SABRE_MODEL) == 0 ||
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strcmp(model, OFW_PSYCHO_MODEL) == 0)) ||
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strcmp(compat, OFW_SABRE_COMPAT) == 0)) {
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device_set_desc(dev, "U2P UPA-PCI bridge");
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return (0);
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}
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return (ENXIO);
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}
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/*
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* SUNW,psycho initialisation ..
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* - find the per-psycho registers
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* - figure out the IGN.
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* - find our partner psycho
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* - configure ourselves
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* - bus range, bus,
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* - interrupt map,
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* - setup the chipsets.
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* - if we're the first of the pair, initialise the IOMMU, otherwise
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* just copy it's tags and addresses.
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*/
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static int
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psycho_attach(device_t dev)
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{
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struct psycho_softc *sc;
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struct psycho_softc *osc = NULL;
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struct psycho_softc *asc;
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struct ofw_nexus_reg *reg;
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char compat[32];
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char *model;
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phandle_t node;
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u_int64_t csr;
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u_long pci_ctl;
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int psycho_br[2];
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int n, i, nreg;
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#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY)
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u_long *map, *clr;
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#endif
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bootverbose = 1;
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node = nexus_get_node(dev);
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sc = device_get_softc(dev);
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if (OF_getprop(node, "compatible", compat, sizeof(compat)) == -1)
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compat[0] = '\0';
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sc->sc_node = node;
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sc->sc_dev = dev;
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sc->sc_bustag = nexus_get_bustag(dev);
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sc->sc_dmatag = nexus_get_dmatag(dev);
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/*
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* call the model-specific initialisation routine.
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*/
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model = nexus_get_model(dev);
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if ((model != NULL &&
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strcmp(model, OFW_SABRE_MODEL) == 0) ||
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strcmp(compat, OFW_SABRE_COMPAT) == 0) {
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sc->sc_mode = PSYCHO_MODE_SABRE;
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if (model == NULL)
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model = "sabre";
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} else if (model != NULL &&
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strcmp(model, OFW_PSYCHO_MODEL) == 0)
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sc->sc_mode = PSYCHO_MODE_PSYCHO;
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else
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panic("psycho_attach: unknown model!");
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/*
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* The psycho gets three register banks:
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* (0) per-PBM configuration and status registers
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* (1) per-PBM PCI configuration space, containing only the
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* PBM 256-byte PCI header
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* (2) the shared psycho configuration registers (struct psychoreg)
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*
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* XXX use the prom address for the psycho registers? we do so far.
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*/
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reg = nexus_get_reg(dev);
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nreg = nexus_get_nreg(dev);
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/* Register layouts are different. stuupid. */
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if (sc->sc_mode == PSYCHO_MODE_PSYCHO) {
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sc->sc_basepaddr = (vm_offset_t)reg[2].or_paddr;
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if (nreg <= 2) {
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panic("psycho_attach: %d not enough registers", nreg);
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}
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if (sparc64_bus_mem_map(UPA_BUS_SPACE, reg[2].or_paddr,
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reg[2].or_len, 0, NULL, (void **)&sc->sc_regs))
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panic("psycho_attach: cannot map regs");
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pci_ctl = reg[0].or_paddr;
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} else {
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sc->sc_basepaddr = (vm_offset_t)reg[0].or_paddr;
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if (nreg <= 0) {
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panic("psycho_attach: %d not enough registers", nreg);
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}
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if (sparc64_bus_mem_map(UPA_BUS_SPACE, reg[0].or_paddr,
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reg[0].or_len, 0, NULL, (void **)&sc->sc_regs))
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panic("psycho_attach: cannot map regs");
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pci_ctl = reg[0].or_paddr +
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offsetof(struct psychoreg, psy_pcictl[0]);
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}
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csr = sc->sc_regs->psy_csr;
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sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */
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if (sc->sc_mode == PSYCHO_MODE_PSYCHO)
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sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6;
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device_printf(dev, "%s: impl %d, version %d: ign %x ",
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model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr),
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sc->sc_ign);
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/*
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* Match other psycho's that are already configured against
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* the base physical address. This will be the same for a
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* pair of devices that share register space.
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*/
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for (n = 0; n < psycho_ndevs && n < sizeof(psycho_softcs) /
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sizeof(psycho_softcs[0]); n++) {
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asc = (struct psycho_softc *)psycho_softcs[n];
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if (asc == NULL || asc == sc)
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/* This entry is not there or it is me */
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continue;
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if (asc->sc_basepaddr != sc->sc_basepaddr)
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/* This is an unrelated psycho */
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continue;
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/* Found partner */
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osc = asc;
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break;
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}
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/*
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* Setup the PCI control register
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*/
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csr = bus_space_read_8(sc->sc_bustag,
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(bus_space_handle_t)pci_ctl, offsetof(struct pci_ctl, pci_csr));
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csr |= PCICTL_MRLM |
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PCICTL_ARB_PARK |
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PCICTL_ERRINTEN |
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PCICTL_4ENABLE;
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csr &= ~(PCICTL_SERR |
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PCICTL_CPU_PRIO |
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PCICTL_ARB_PRIO |
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PCICTL_RTRYWAIT);
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bus_space_write_8(sc->sc_bustag,
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(bus_space_handle_t)pci_ctl, offsetof(struct pci_ctl, pci_csr),
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csr);
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/* grab the psycho ranges */
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psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange);
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/* get the bus-range for the psycho */
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n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br));
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if (n == -1)
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panic("could not get psycho bus-range");
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if (n != sizeof(psycho_br))
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panic("broken psycho bus-range (%d)", n);
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printf("bus range %u to %u; PCI bus %d\n", psycho_br[0], psycho_br[1],
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psycho_br[0]);
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sc->sc_busno = psycho_br[0];
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/* Initialize memory and i/o rmans */
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sc->sc_io_rman.rm_type = RMAN_ARRAY;
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sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports";
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if (rman_init(&sc->sc_io_rman) != 0 ||
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rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0)
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panic("psycho_probe: failed to set up i/o rman");
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "Psycho PCI Memory";
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if (rman_init(&sc->sc_mem_rman) != 0 ||
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rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0)
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panic("psycho_probe: failed to set up memory rman");
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/*
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* Find the addresses of the various bus spaces.
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* There should not be multiple ones of one kind.
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* The physical start addresses of the ranges are the configuration,
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* memory and IO handles.
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*/
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for (n = 0; n < sc->sc_nrange; n++) {
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i = UPA_RANGE_CS(&sc->sc_range[n]);
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if (sc->sc_bh[i] != 0)
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panic("psycho_attach: duplicate range for space %d", i);
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sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]);
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}
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/*
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* Check that all needed handles are present. The PCI_CS_MEM64 one is
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* not currently used.
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*/
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for (n = 0; n < 3; n++) {
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if (sc->sc_bh[n] == 0)
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panic("psycho_attach: range %d missing", n);
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}
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/* allocate our tags */
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sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
|
|
sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE);
|
|
sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE);
|
|
if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL,
|
|
0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_dmat) != 0)
|
|
panic("bus_dma_tag_create failed");
|
|
/* Customize the tag */
|
|
sc->sc_dmat->cookie = sc;
|
|
sc->sc_dmat->dmamem_alloc = psycho_dmamem_alloc;
|
|
sc->sc_dmat->dmamem_free = psycho_dmamem_free;
|
|
sc->sc_dmat->dmamap_load = psycho_dmamap_load;
|
|
sc->sc_dmat->dmamap_unload = psycho_dmamap_unload;
|
|
sc->sc_dmat->dmamap_sync = psycho_dmamap_sync;
|
|
/* XXX: register as root dma tag (kluge). */
|
|
sparc64_root_dma_tag = sc->sc_dmat;
|
|
|
|
if ((sc->sc_nintrmap = OF_getprop_alloc(sc->sc_node, "interrupt-map",
|
|
sizeof(*sc->sc_intrmap), (void **)&sc->sc_intrmap)) == -1 ||
|
|
OF_getprop(sc->sc_node, "interrupt-map-mask", &sc->sc_intrmapmsk,
|
|
sizeof(sc->sc_intrmapmsk)) == -1) {
|
|
if (sc->sc_intrmap != NULL) {
|
|
free(sc->sc_intrmap, M_OFWPROP);
|
|
sc->sc_intrmap = NULL;
|
|
}
|
|
}
|
|
|
|
/* Register the softc, this is needed for paired psychos. */
|
|
if (psycho_ndevs < sizeof(psycho_softcs) / sizeof(psycho_softcs[0]))
|
|
psycho_softcs[psycho_ndevs] = sc;
|
|
else
|
|
device_printf(dev, "XXX: bump the number of psycho_softcs");
|
|
psycho_ndevs++;
|
|
/*
|
|
* And finally, if we're a sabre or the first of a pair of psycho's to
|
|
* arrive here, start up the IOMMU and get a config space tag.
|
|
*/
|
|
if (osc == NULL) {
|
|
/*
|
|
* Establish handlers for interesting interrupts....
|
|
*
|
|
* XXX We need to remember these and remove this to support
|
|
* hotplug on the UPA/FHC bus.
|
|
*
|
|
* XXX Not all controllers have these, but installing them
|
|
* is better than trying to sort through this mess.
|
|
*/
|
|
psycho_set_intr(sc, 0, dev, &sc->sc_regs->ue_int_map,
|
|
INTR_TYPE_MISC | INTR_FAST, psycho_ue);
|
|
psycho_set_intr(sc, 1, dev, &sc->sc_regs->ce_int_map,
|
|
INTR_TYPE_MISC, psycho_ce);
|
|
psycho_set_intr(sc, 2, dev,
|
|
&sc->sc_regs->pciaerr_int_map, INTR_TYPE_MISC | INTR_FAST,
|
|
psycho_bus_a);
|
|
psycho_set_intr(sc, 3, dev,
|
|
&sc->sc_regs->pciberr_int_map, INTR_TYPE_MISC | INTR_FAST,
|
|
psycho_bus_b);
|
|
psycho_set_intr(sc, 4, dev, &sc->sc_regs->power_int_map,
|
|
INTR_TYPE_MISC | INTR_FAST, psycho_powerfail);
|
|
#ifdef PSYCHO_MAP_WAKEUP
|
|
/*
|
|
* On some models, this is mapped to the same interrupt as
|
|
* pciberr by default, so leave it alone for now since
|
|
* psycho_wakeup() doesn't do anything useful anyway.
|
|
*/
|
|
psycho_set_intr(sc, 5, dev, &sc->sc_regs->pwrmgt_int_map,
|
|
INTR_TYPE_MISC, psycho_wakeup);
|
|
#endif /* PSYCHO_MAP_WAKEUP */
|
|
|
|
/*
|
|
* Setup IOMMU and PCI configuration if we're the first
|
|
* of a pair of psycho's to arrive here.
|
|
*
|
|
* We should calculate a TSB size based on amount of RAM
|
|
* and number of bus controllers and number an type of
|
|
* child devices.
|
|
*
|
|
* For the moment, 32KB should be more than enough.
|
|
*/
|
|
psycho_iommu_init(sc, 2);
|
|
} else {
|
|
/* Just copy IOMMU state, config tag and address */
|
|
sc->sc_is = osc->sc_is;
|
|
}
|
|
|
|
/*
|
|
* Enable all interrupts, clear all interrupt states, and install an
|
|
* interrupt handler for OBIO interrupts, which can be ISA ones
|
|
* (to frob the interrupt clear registers).
|
|
* This aids the debugging of interrupt routing problems, and is needed
|
|
* for isa drivers that use isa_irq_pending (otherwise the registers
|
|
* will never be cleared).
|
|
*/
|
|
#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY)
|
|
for (map = &sc->sc_regs->pcia0_int_map,
|
|
clr = &sc->sc_regs->pcia0_int_clr[0], n = 0;
|
|
map <= &sc->sc_regs->pcib3_int_map; map++, clr += 4, n++) {
|
|
#ifdef PSYCHO_DEBUG
|
|
device_printf(dev, "intr map (pci) %d: %lx\n", n, *map);
|
|
#endif
|
|
*map &= ~INTMAP_V;
|
|
membar(StoreStore);
|
|
for (i = 0; i < 4; i++)
|
|
clr[i] = 0;
|
|
membar(StoreStore);
|
|
*map |= INTMAP_V;
|
|
}
|
|
for (map = &sc->sc_regs->scsi_int_map, n = 0,
|
|
clr = &sc->sc_regs->scsi_int_clr, n = 0;
|
|
map <= &sc->sc_regs->ffb1_int_map; map++, clr++, n++) {
|
|
#ifdef PSYCHO_DEBUG
|
|
device_printf(dev, "intr map (obio) %d: %lx, clr: %p\n", n,
|
|
*map, clr);
|
|
#endif
|
|
*map &= ~INTMAP_V;
|
|
membar(StoreStore);
|
|
*clr = 0;
|
|
#ifdef PSYCHO_STRAY
|
|
/*
|
|
* This can cause interrupt storms, and is therefore disabled
|
|
* by default.
|
|
* XXX: use intr_setup() to not confuse higher level code
|
|
*/
|
|
if (INTVEC(*map) != 0x7e6 && INTVEC(*map) != 0x7e7 &&
|
|
INTVEC(*map) != 0)
|
|
intr_setup(PIL_LOW, intr_dequeue, INTVEC(*map), psycho_intr_stray,
|
|
(void *)clr);
|
|
#endif
|
|
membar(StoreStore);
|
|
*map |= INTMAP_V;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Initialize the interrupt registers of all devices hanging from
|
|
* the host bridge directly or indirectly via PCI-PCI bridges.
|
|
* The MI code (and the PCI spec) assume that this is done during
|
|
* system initialization, however the firmware does not do this
|
|
* at least on some models, and we probably shouldn't trust that
|
|
* the firmware uses the same model as this driver if it does.
|
|
*/
|
|
ofw_pci_init_intr(dev, sc->sc_node, sc->sc_intrmap, sc->sc_nintrmap,
|
|
&sc->sc_intrmapmsk);
|
|
|
|
device_add_child(dev, "pci", device_get_unit(dev));
|
|
return (bus_generic_attach(dev));
|
|
}
|
|
|
|
static void
|
|
psycho_set_intr(struct psycho_softc *sc, int index,
|
|
device_t dev, u_long *map, int iflags, driver_intr_t handler)
|
|
{
|
|
int rid;
|
|
|
|
sc->sc_irq[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
|
|
INTVEC(*map), INTVEC(*map), 1, RF_ACTIVE);
|
|
if (sc->sc_irq[index] == NULL)
|
|
panic("psycho_set_intr: failed to get interupt");
|
|
bus_setup_intr(dev, sc->sc_irq[index], INTR_TYPE_MISC | iflags,
|
|
handler, sc, &sc->sc_ihand[index]);
|
|
*map |= INTMAP_V;
|
|
}
|
|
|
|
static int
|
|
psycho_find_intrmap(struct psycho_softc *sc, int ino, u_long **intrmapptr,
|
|
u_long **intrclrptr, u_long *intrdiagptr)
|
|
{
|
|
u_long *intrmap, *intrclr, diag;
|
|
int found;
|
|
|
|
found = 0;
|
|
/* Hunt thru obio first */
|
|
diag = sc->sc_regs->obio_int_diag;
|
|
for (intrmap = &sc->sc_regs->scsi_int_map,
|
|
intrclr = &sc->sc_regs->scsi_int_clr;
|
|
intrmap <= &sc->sc_regs->ffb1_int_map;
|
|
intrmap++, intrclr++, diag >>= 2) {
|
|
if (INTINO(*intrmap) == ino) {
|
|
diag &= 2;
|
|
found = 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!found) {
|
|
diag = sc->sc_regs->pci_int_diag;
|
|
/* Now do PCI interrupts */
|
|
for (intrmap = &sc->sc_regs->pcia0_int_map,
|
|
intrclr = &sc->sc_regs->pcia0_int_clr[0];
|
|
intrmap <= &sc->sc_regs->pcib3_int_map;
|
|
intrmap++, intrclr += 4, diag >>= 8) {
|
|
if (((*intrmap ^ ino) & 0x3c) == 0) {
|
|
intrclr += ino & 3;
|
|
diag = (diag >> ((ino & 3) * 2)) & 2;
|
|
found = 1;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
if (intrmapptr != NULL)
|
|
*intrmapptr = intrmap;
|
|
if (intrclrptr != NULL)
|
|
*intrclrptr = intrclr;
|
|
if (intrdiagptr != NULL)
|
|
*intrdiagptr = diag;
|
|
return (found);
|
|
}
|
|
|
|
/* grovel the OBP for various psycho properties */
|
|
static void
|
|
psycho_get_ranges(phandle_t node, struct upa_ranges **rp, int *np)
|
|
{
|
|
|
|
*np = OF_getprop_alloc(node, "ranges", sizeof(**rp), (void **)rp);
|
|
if (*np == -1)
|
|
panic("could not get psycho ranges");
|
|
}
|
|
|
|
/*
|
|
* Interrupt handlers.
|
|
*/
|
|
static void
|
|
psycho_ue(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
struct psychoreg *regs = sc->sc_regs;
|
|
|
|
sc->sc_regs->ue_int_clr = 0;
|
|
/* It's uncorrectable. Dump the regs and panic. */
|
|
panic("%s: uncorrectable DMA error AFAR %llx AFSR %llx\n",
|
|
device_get_name(sc->sc_dev),
|
|
(long long)regs->psy_ue_afar, (long long)regs->psy_ue_afsr);
|
|
}
|
|
|
|
static void
|
|
psycho_ce(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
struct psychoreg *regs = sc->sc_regs;
|
|
|
|
sc->sc_regs->ce_int_clr = 0;
|
|
/* It's correctable. Dump the regs and continue. */
|
|
printf("%s: correctable DMA error AFAR %llx AFSR %llx\n",
|
|
device_get_name(sc->sc_dev),
|
|
(long long)regs->psy_ce_afar, (long long)regs->psy_ce_afsr);
|
|
}
|
|
|
|
static void
|
|
psycho_bus_a(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
struct psychoreg *regs = sc->sc_regs;
|
|
|
|
sc->sc_regs->pciaerr_int_clr = 0;
|
|
/* It's uncorrectable. Dump the regs and panic. */
|
|
panic("%s: PCI bus A error AFAR %lx AFSR %lx\n",
|
|
device_get_name(sc->sc_dev),
|
|
regs->psy_pcictl[0].pci_afar, regs->psy_pcictl[0].pci_afsr);
|
|
}
|
|
|
|
static void
|
|
psycho_bus_b(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
struct psychoreg *regs = sc->sc_regs;
|
|
|
|
sc->sc_regs->pciberr_int_clr = 0;
|
|
/* It's uncorrectable. Dump the regs and panic. */
|
|
panic("%s: PCI bus B error AFAR %lx AFSR %lx\n",
|
|
device_get_name(sc->sc_dev),
|
|
regs->psy_pcictl[1].pci_afar, regs->psy_pcictl[1].pci_afsr);
|
|
}
|
|
|
|
static void
|
|
psycho_powerfail(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
|
|
sc->sc_regs->power_int_clr = 0;
|
|
/* We lost power. Try to shut down NOW. */
|
|
printf("Power Failure Detected: Shutting down NOW.\n");
|
|
shutdown_nice(0);
|
|
}
|
|
|
|
#ifdef PSYCHO_MAP_WAKEUP
|
|
static void
|
|
psycho_wakeup(void *arg)
|
|
{
|
|
struct psycho_softc *sc = (struct psycho_softc *)arg;
|
|
|
|
sc->sc_regs->pwrmgt_int_clr = 0;
|
|
/* Gee, we don't really have a framework to deal with this properly. */
|
|
printf("%s: power management wakeup\n", device_get_name(sc->sc_dev));
|
|
}
|
|
#endif /* PSYCHO_MAP_WAKEUP */
|
|
|
|
/* initialise the IOMMU... */
|
|
void
|
|
psycho_iommu_init(struct psycho_softc *sc, int tsbsize)
|
|
{
|
|
char *name;
|
|
struct iommu_state *is;
|
|
u_int32_t iobase = -1;
|
|
int *vdma = NULL;
|
|
int nitem;
|
|
|
|
is = malloc(sizeof(struct iommu_state), M_DEVBUF, M_NOWAIT);
|
|
if (is == NULL)
|
|
panic("psycho_iommu_init: malloc failed");
|
|
|
|
sc->sc_is = is;
|
|
|
|
/* punch in our copies */
|
|
is->is_bustag = sc->sc_bustag;
|
|
is->is_iommu = &sc->sc_regs->psy_iommu;
|
|
is->is_dtag = &sc->sc_regs->tlb_tag_diag[0];
|
|
is->is_ddram = &sc->sc_regs->tlb_data_diag[0];
|
|
is->is_dqueue = &sc->sc_regs->iommu_queue_diag[0];
|
|
is->is_dva = &sc->sc_regs->iommu_svadiag;
|
|
is->is_dtcmp = &sc->sc_regs->iommu_tlb_comp_diag;
|
|
|
|
if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0)
|
|
is->is_sb = 0;
|
|
else
|
|
is->is_sb = &sc->sc_regs->psy_iommu_strbuf;
|
|
|
|
/*
|
|
* Separate the men from the boys. Get the `virtual-dma'
|
|
* property for sabre and use that to make sure the damn
|
|
* iommu works.
|
|
*
|
|
* We could query the `#virtual-dma-size-cells' and
|
|
* `#virtual-dma-addr-cells' and DTRT, but I'm lazy.
|
|
*/
|
|
nitem = OF_getprop_alloc(sc->sc_node, "virtual-dma", sizeof(vdma),
|
|
(void **)&vdma);
|
|
if (nitem > 0) {
|
|
iobase = vdma[0];
|
|
tsbsize = ffs(vdma[1]);
|
|
if (tsbsize < 25 || tsbsize > 31 ||
|
|
(vdma[1] & ~(1 << (tsbsize - 1))) != 0) {
|
|
printf("bogus tsb size %x, using 7\n", vdma[1]);
|
|
tsbsize = 31;
|
|
}
|
|
tsbsize -= 24;
|
|
free(vdma, M_OFWPROP);
|
|
}
|
|
|
|
/* give us a nice name.. */
|
|
name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
|
|
if (name == 0)
|
|
panic("couldn't malloc iommu name");
|
|
snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev));
|
|
|
|
iommu_init(name, is, tsbsize, iobase);
|
|
}
|
|
|
|
static int
|
|
psycho_maxslots(device_t dev)
|
|
{
|
|
|
|
/*
|
|
* XXX: is this correct? At any rate, a number that is too high
|
|
* shouldn't do any harm, if only because of the way things are
|
|
* handled in psycho_read_config.
|
|
*/
|
|
return (31);
|
|
}
|
|
|
|
/*
|
|
* Keep a table of quirky PCI devices that need fixups before the MI PCI code
|
|
* creates the resource lists. This needs to be moved around once other bus
|
|
* drivers are added. Moving it to the MI code should maybe be reconsidered
|
|
* if one of these devices appear in non-sparc64 boxen. It's likely that not
|
|
* all BIOSes/firmwares can deal with them.
|
|
*/
|
|
struct psycho_dquirk {
|
|
u_int32_t dq_devid;
|
|
int dq_quirk;
|
|
};
|
|
|
|
/* Quirk types. May be or'ed together. */
|
|
#define DQT_BAD_INTPIN 1 /* Intpin reg 0, but intpin used */
|
|
|
|
static struct psycho_dquirk dquirks[] = {
|
|
{ 0x1001108e, DQT_BAD_INTPIN }, /* Sun HME (PCIO func. 1) */
|
|
{ 0x1101108e, DQT_BAD_INTPIN }, /* Sun GEM (PCIO2 func. 1) */
|
|
};
|
|
|
|
#define NDQUIRKS (sizeof(dquirks) / sizeof(dquirks[0]))
|
|
|
|
static u_int32_t
|
|
psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
|
|
int width)
|
|
{
|
|
struct psycho_softc *sc;
|
|
bus_space_handle_t bh;
|
|
u_long offset = 0;
|
|
u_int32_t r, devid;
|
|
int i;
|
|
|
|
/*
|
|
* The psycho bridge does not tolerate accesses to unconfigured PCI
|
|
* devices' or function's config space, so look up the device in the
|
|
* firmware device tree first, and if it is not present, return a value
|
|
* that will make the detection code think that there is no device here.
|
|
* This is ugly...
|
|
*/
|
|
if (reg == 0 && ofw_pci_find_node(bus, slot, func) == 0)
|
|
return (0xffffffff);
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
offset = PSYCHO_CONF_OFF(bus, slot, func, reg);
|
|
bh = sc->sc_bh[PCI_CS_CONFIG];
|
|
switch (width) {
|
|
case 1:
|
|
r = bus_space_read_1(sc->sc_cfgt, bh, offset);
|
|
break;
|
|
case 2:
|
|
r = bus_space_read_2(sc->sc_cfgt, bh, offset);
|
|
break;
|
|
case 4:
|
|
r = bus_space_read_4(sc->sc_cfgt, bh, offset);
|
|
break;
|
|
default:
|
|
panic("psycho_read_config: bad width");
|
|
}
|
|
if (reg == PCIR_INTPIN && r == 0) {
|
|
/* Check for DQT_BAD_INTPIN quirk. */
|
|
devid = psycho_read_config(dev, bus, slot, func,
|
|
PCIR_DEVVENDOR, 4);
|
|
for (i = 0; i < NDQUIRKS; i++) {
|
|
if (dquirks[i].dq_devid == devid) {
|
|
/*
|
|
* Need to set the intpin to a value != 0 so
|
|
* that the MI code will think that this device
|
|
* has an interrupt.
|
|
* Just use 1 (intpin a) for now. This is, of
|
|
* course, bogus, but since interrupts are
|
|
* routed in advance, this does not really
|
|
* matter.
|
|
*/
|
|
if ((dquirks[i].dq_quirk & DQT_BAD_INTPIN) != 0)
|
|
r = 1;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
return (r);
|
|
}
|
|
|
|
static void
|
|
psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
u_int reg, u_int32_t val, int width)
|
|
{
|
|
struct psycho_softc *sc;
|
|
bus_space_handle_t bh;
|
|
u_long offset = 0;
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
offset = PSYCHO_CONF_OFF(bus, slot, func, reg);
|
|
bh = sc->sc_bh[PCI_CS_CONFIG];
|
|
switch (width) {
|
|
case 1:
|
|
bus_space_write_1(sc->sc_cfgt, bh, offset, val);
|
|
break;
|
|
case 2:
|
|
bus_space_write_2(sc->sc_cfgt, bh, offset, val);
|
|
break;
|
|
case 4:
|
|
bus_space_write_4(sc->sc_cfgt, bh, offset, val);
|
|
break;
|
|
default:
|
|
panic("psycho_write_config: bad width");
|
|
}
|
|
}
|
|
|
|
static int
|
|
psycho_route_interrupt(device_t bus, device_t dev, int pin)
|
|
{
|
|
|
|
/*
|
|
* Since we preinitialize all interrupt line registers, this should not
|
|
* happen for any built-in device.
|
|
* Devices on bridges that route interrupts cannot work now - the
|
|
* interrupt pin mappings are not known from the firmware...
|
|
*/
|
|
panic("psycho_route_interrupt");
|
|
}
|
|
|
|
static int
|
|
psycho_read_ivar(device_t dev, device_t child, int which, u_long *result)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
switch (which) {
|
|
case PCIB_IVAR_BUS:
|
|
*result = sc->sc_busno;
|
|
return (0);
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
/* Write to the correct clr register, and call the actual handler. */
|
|
static void
|
|
psycho_intr_stub(void *arg)
|
|
{
|
|
struct psycho_clr *pc;
|
|
|
|
pc = (struct psycho_clr *)arg;
|
|
*pc->pci_clr = 0;
|
|
pc->pci_handler(pc->pci_arg);
|
|
}
|
|
|
|
#ifdef PSYCHO_STRAY
|
|
/*
|
|
* Write to the correct clr register and return. arg is the address of the clear
|
|
* register to be used.
|
|
* XXX: print a message?
|
|
*/
|
|
static void
|
|
psycho_intr_stray(void *arg)
|
|
{
|
|
|
|
*((u_long *)arg) = 0;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
psycho_setup_intr(device_t dev, device_t child,
|
|
struct resource *ires, int flags, driver_intr_t *intr, void *arg,
|
|
void **cookiep)
|
|
{
|
|
struct psycho_softc *sc;
|
|
struct psycho_clr *pc;
|
|
u_long *intrmapptr, *intrclrptr;
|
|
int ino;
|
|
int error;
|
|
long vec = rman_get_start(ires);
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
pc = (struct psycho_clr *)
|
|
malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT);
|
|
if (pc == NULL)
|
|
return (NULL);
|
|
|
|
/*
|
|
* Hunt through all the interrupt mapping regs to look for our
|
|
* interrupt vector.
|
|
*
|
|
* XXX We only compare INOs rather than IGNs since the firmware may
|
|
* not provide the IGN and the IGN is constant for all device on that
|
|
* PCI controller. This could cause problems for the FFB/external
|
|
* interrupt which has a full vector that can be set arbitrarily.
|
|
*/
|
|
ino = INTINO(vec);
|
|
|
|
if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) {
|
|
printf("Cannot find interrupt vector %lx\n", vec);
|
|
free(pc, M_DEVBUF);
|
|
return (NULL);
|
|
}
|
|
|
|
#ifdef PSYCHO_DEBUG
|
|
device_printf(dev, "psycho_setup_intr: INO %d, map %p, clr %p\n", ino,
|
|
intrmapptr, intrclrptr);
|
|
#endif
|
|
pc->pci_arg = arg;
|
|
pc->pci_handler = intr;
|
|
pc->pci_clr = intrclrptr;
|
|
/* Disable the interrupt while we fiddle with it */
|
|
*intrmapptr &= ~INTMAP_V;
|
|
membar(Sync);
|
|
error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
|
|
psycho_intr_stub, pc, cookiep);
|
|
if (error != 0) {
|
|
free(pc, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
pc->pci_cookie = *cookiep;
|
|
*cookiep = pc;
|
|
|
|
/*
|
|
* Clear the interrupt, it might have been triggered before it was
|
|
* set up.
|
|
*/
|
|
*intrclrptr = 0;
|
|
membar(StoreStore);
|
|
/*
|
|
* Enable the interrupt now we have the handler installed.
|
|
* Read the current value as we can't change it besides the
|
|
* valid bit so so make sure only this bit is changed.
|
|
*/
|
|
*intrmapptr |= INTMAP_V;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
psycho_teardown_intr(device_t dev, device_t child,
|
|
struct resource *vec, void *cookie)
|
|
{
|
|
struct psycho_clr *pc;
|
|
int error;
|
|
|
|
pc = (struct psycho_clr *)cookie;
|
|
error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
|
|
pc->pci_cookie);
|
|
/*
|
|
* Don't disable the interrupt for now, so that stray interupts get
|
|
* detected...
|
|
*/
|
|
if (error != 0)
|
|
free(pc, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
|
|
static struct resource *
|
|
psycho_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
{
|
|
struct psycho_softc *sc;
|
|
struct resource *rv;
|
|
struct rman *rm;
|
|
bus_space_tag_t bt;
|
|
bus_space_handle_t bh;
|
|
int needactivate = flags & RF_ACTIVE;
|
|
|
|
flags &= ~RF_ACTIVE;
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(bus);
|
|
if (type == SYS_RES_IRQ) {
|
|
/*
|
|
* XXX: Don't accept blank ranges for now, only single
|
|
* interrupts. The other case should not happen with the MI pci
|
|
* code...
|
|
* XXX: This may return a resource that is out of the range
|
|
* that was specified. Is this correct...?
|
|
*/
|
|
if (start != end)
|
|
panic("psycho_alloc_resource: XXX: interrupt range");
|
|
start = end |= sc->sc_ign;
|
|
return (bus_alloc_resource(bus, type, rid, start, end,
|
|
count, flags));
|
|
}
|
|
switch (type) {
|
|
case SYS_RES_MEMORY:
|
|
rm = &sc->sc_mem_rman;
|
|
bt = sc->sc_memt;
|
|
bh = sc->sc_bh[PCI_CS_MEM32];
|
|
break;
|
|
case SYS_RES_IOPORT:
|
|
rm = &sc->sc_io_rman;
|
|
bt = sc->sc_iot;
|
|
/* XXX: probably should use ranges property here. */
|
|
bh = sc->sc_bh[PCI_CS_IO];
|
|
break;
|
|
default:
|
|
return (NULL);
|
|
}
|
|
|
|
rv = rman_reserve_resource(rm, start, end, count, flags, child);
|
|
if (rv == NULL)
|
|
return (NULL);
|
|
|
|
bh += rman_get_start(rv);
|
|
rman_set_bustag(rv, bt);
|
|
rman_set_bushandle(rv, bh);
|
|
|
|
if (needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv)) {
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
return (rv);
|
|
}
|
|
|
|
static int
|
|
psycho_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_activate_resource(bus, type, rid, r));
|
|
return (rman_activate_resource(r));
|
|
}
|
|
|
|
static int
|
|
psycho_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_deactivate_resource(bus, type, rid, r));
|
|
return (rman_deactivate_resource(r));
|
|
}
|
|
|
|
static int
|
|
psycho_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
int error;
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_release_resource(bus, type, rid, r));
|
|
if (rman_get_flags(r) & RF_ACTIVE) {
|
|
error = bus_deactivate_resource(child, type, rid, r);
|
|
if (error)
|
|
return error;
|
|
}
|
|
return (rman_release_resource(r));
|
|
}
|
|
|
|
static int
|
|
psycho_intr_pending(device_t dev, int intr)
|
|
{
|
|
struct psycho_softc *sc;
|
|
u_long diag;
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) {
|
|
printf("psycho_intr_pending: mapping not found for %d\n", intr);
|
|
return (0);
|
|
}
|
|
return (diag != 0);
|
|
}
|
|
|
|
static bus_space_handle_t
|
|
psycho_get_bus_handle(device_t dev, enum sbbt_id id,
|
|
bus_space_handle_t childhdl, bus_space_tag_t *tag)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)device_get_softc(dev);
|
|
switch(id) {
|
|
case SBBT_IO:
|
|
*tag = sc->sc_iot;
|
|
return (sc->sc_bh[PCI_CS_IO] + childhdl);
|
|
case SBBT_MEM:
|
|
*tag = sc->sc_memt;
|
|
return (sc->sc_bh[PCI_CS_MEM32] + childhdl);
|
|
default:
|
|
panic("psycho_get_bus_handle: illegal space\n");
|
|
}
|
|
}
|
|
|
|
/*
|
|
* below here is bus space and bus dma support
|
|
*/
|
|
static bus_space_tag_t
|
|
psycho_alloc_bus_tag(struct psycho_softc *sc, int type)
|
|
{
|
|
bus_space_tag_t bt;
|
|
|
|
bt = (bus_space_tag_t)
|
|
malloc(sizeof(struct bus_space_tag), M_DEVBUF, M_NOWAIT);
|
|
if (bt == NULL)
|
|
panic("could not allocate psycho bus tag");
|
|
|
|
bzero(bt, sizeof *bt);
|
|
bt->cookie = sc;
|
|
bt->parent = sc->sc_bustag;
|
|
bt->type = type;
|
|
return (bt);
|
|
}
|
|
|
|
/*
|
|
* hooks into the iommu dvma calls.
|
|
*/
|
|
static int
|
|
psycho_dmamem_alloc(bus_dma_tag_t dmat, void **vaddr, int flags, bus_dmamap_t *mapp)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)dmat->cookie;
|
|
return (iommu_dvmamem_alloc(dmat, sc->sc_is, vaddr, flags, mapp));
|
|
}
|
|
|
|
static void
|
|
psycho_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)dmat->cookie;
|
|
return (iommu_dvmamem_free(dmat, sc->sc_is, vaddr, map));
|
|
}
|
|
|
|
static int
|
|
psycho_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
|
|
bus_size_t buflen, bus_dmamap_callback_t *callback, void *callback_arg,
|
|
int flags)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)dmat->cookie;
|
|
return (iommu_dvmamap_load(dmat, sc->sc_is, map, buf, buflen, callback,
|
|
callback_arg, flags));
|
|
}
|
|
|
|
static void
|
|
psycho_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)dmat->cookie;
|
|
iommu_dvmamap_unload(dmat, sc->sc_is, map);
|
|
}
|
|
|
|
static void
|
|
psycho_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map,
|
|
bus_dmasync_op_t op)
|
|
{
|
|
struct psycho_softc *sc;
|
|
|
|
sc = (struct psycho_softc *)dmat->cookie;
|
|
iommu_dvmamap_sync(dmat, sc->sc_is, map, op);
|
|
}
|