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3bafc9d432
- Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
100 lines
3.0 KiB
C
100 lines
3.0 KiB
C
/*
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* Instruction formats for the sequencer program downloaded to
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* Aic7xxx SCSI host adapters
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*
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* Copyright (c) 1997, 1998 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Where this Software is combined with software released under the terms of
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* the GNU Public License ("GPL") and the terms of the GPL would require the
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* combined work to also be released under the terms of the GPL, the terms
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* and conditions of this License will apply in addition to those of the
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* GPL with the exception of any terms or conditions of this License that
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* conflict with, or are expressly prohibited by, the GPL.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: sequencer.h,v 1.3 1997/09/27 19:37:31 gibbs Exp $
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*/
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struct ins_format1 {
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u_int32_t immediate : 8,
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source : 9,
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destination : 9,
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ret : 1,
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opcode : 4,
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parity : 1;
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};
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struct ins_format2 {
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u_int32_t shift_control : 8,
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source : 9,
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destination : 9,
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ret : 1,
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opcode : 4,
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parity : 1;
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};
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struct ins_format3 {
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u_int32_t immediate : 8,
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source : 9,
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address : 10,
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opcode : 4,
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parity : 1;
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};
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union ins_formats {
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struct ins_format1 format1;
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struct ins_format2 format2;
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struct ins_format3 format3;
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u_int8_t bytes[4];
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u_int32_t integer;
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};
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struct instruction {
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union ins_formats format;
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u_int srcline;
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struct symbol *patch_label;
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STAILQ_ENTRY(instruction) links;
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};
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#define AIC_OP_OR 0x0
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#define AIC_OP_AND 0x1
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#define AIC_OP_XOR 0x2
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#define AIC_OP_ADD 0x3
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#define AIC_OP_ADC 0x4
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#define AIC_OP_ROL 0x5
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#define AIC_OP_BMOV 0x6
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#define AIC_OP_JMP 0x8
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#define AIC_OP_JC 0x9
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#define AIC_OP_JNC 0xa
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#define AIC_OP_CALL 0xb
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#define AIC_OP_JNE 0xc
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#define AIC_OP_JNZ 0xd
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#define AIC_OP_JE 0xe
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#define AIC_OP_JZ 0xf
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/* Pseudo Ops */
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#define AIC_OP_SHL 0x10
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#define AIC_OP_SHR 0x20
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#define AIC_OP_ROR 0x30
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