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90ce56c287
device drivers for bus system with other endinesses than the CPU (using interfaces compatible to NetBSD): - bwap16() and bswap32(). These have optimized implementations on some architectures; for those that don't, there exist generic implementations. - macros to convert from a certain byte order to host byte order and vice versa, using a naming scheme like le16toh(), htole16(). These are implemented using the bswap functions. - stream bus space access functions, which do not perform a byte order conversion (while the normal access functions would if the bus endianess differs from the CPU endianess). htons(), htonl(), ntohs() and ntohl() are implemented using the new functions above for kernel usage. None of the above interfaces is currently exported to user land. Make use of the new functions in a few places where local implementations of the same functionality existed. Reviewed by: mike, bde Tested on alpha by: mike
111 lines
4.6 KiB
C
111 lines
4.6 KiB
C
/*-
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* Copyright (c) KATO Takenori, 1999.
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*
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* All rights reserved. Unpublished rights reserved under the copyright
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* laws of Japan.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer as
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* the first lines of this file unmodified.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _I386_BUS_H_
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#define _I386_BUS_H_
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#ifdef PC98
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/* NEC PC-98 */
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#include <machine/bus_pc98.h>
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#else
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/* IBM-PC */
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#include <machine/bus_at386.h>
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#endif
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#include <machine/bus_dma.h>
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/*
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* Stream accesses are the same as normal accesses on i386/pc98; there are no
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* supported bus systems with an endianess different from the host one.
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*/
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#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o))
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#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o))
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#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
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#define bus_space_read_multi_stream_1(t, h, o, a, c) \
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bus_space_read_multi_1((t), (h), (o), (a), (c))
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#define bus_space_read_multi_stream_2(t, h, o, a, c) \
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bus_space_read_multi_2((t), (h), (o), (a), (c))
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#define bus_space_read_multi_stream_4(t, h, o, a, c) \
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bus_space_read_multi_4((t), (h), (o), (a), (c))
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#define bus_space_write_stream_1(t, h, o, v) \
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bus_space_write_1((t), (h), (o), (v))
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#define bus_space_write_stream_2(t, h, o, v) \
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bus_space_write_2((t), (h), (o), (v))
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#define bus_space_write_stream_4(t, h, o, v) \
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bus_space_write_4((t), (h), (o), (v))
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#define bus_space_write_multi_stream_1(t, h, o, a, c) \
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bus_space_write_multi_1((t), (h), (o), (a), (c))
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#define bus_space_write_multi_stream_2(t, h, o, a, c) \
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bus_space_write_multi_2((t), (h), (o), (a), (c))
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#define bus_space_write_multi_stream_4(t, h, o, a, c) \
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bus_space_write_multi_4((t), (h), (o), (a), (c))
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#define bus_space_set_multi_stream_1(t, h, o, v, c) \
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bus_space_set_multi_1((t), (h), (o), (v), (c))
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#define bus_space_set_multi_stream_2(t, h, o, v, c) \
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bus_space_set_multi_2((t), (h), (o), (v), (c))
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#define bus_space_set_multi_stream_4(t, h, o, v, c) \
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bus_space_set_multi_4((t), (h), (o), (v), (c))
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#define bus_space_read_region_stream_1(t, h, o, a, c) \
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bus_space_read_region_1((t), (h), (o), (a), (c))
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#define bus_space_read_region_stream_2(t, h, o, a, c) \
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bus_space_read_region_2((t), (h), (o), (a), (c))
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#define bus_space_read_region_stream_4(t, h, o, a, c) \
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bus_space_read_region_4((t), (h), (o), (a), (c))
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#define bus_space_write_region_stream_1(t, h, o, a, c) \
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bus_space_write_region_1((t), (h), (o), (a), (c))
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#define bus_space_write_region_stream_2(t, h, o, a, c) \
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bus_space_write_region_2((t), (h), (o), (a), (c))
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#define bus_space_write_region_stream_4(t, h, o, a, c) \
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bus_space_write_region_4((t), (h), (o), (a), (c))
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#define bus_space_set_region_stream_1(t, h, o, v, c) \
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bus_space_set_region_1((t), (h), (o), (v), (c))
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#define bus_space_set_region_stream_2(t, h, o, v, c) \
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bus_space_set_region_2((t), (h), (o), (v), (c))
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#define bus_space_set_region_stream_4(t, h, o, v, c) \
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bus_space_set_region_4((t), (h), (o), (v), (c))
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#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
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bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
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#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
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bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
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#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
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bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
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#endif /* _I386_BUS_H_ */
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