John Baldwin 58ccad7ddc Add support for corrected machine check interrupts. CMCI is a new local ... APIC interrupt that fires when a threshold of corrected machine check events is reached. CMCI also includes a count of events when reporting corrected errors in the bank's status register. Note that individual banks may or may not support CMCI. If they do, each bank includes its own threshold register that determines when the interrupt fires. Currently the code uses a very simple strategy where it doubles the threshold on each interrupt until it succeeds in throttling the interrupt to occur only once a minute (this interval can be tuned via sysctl). The threshold is also adjusted on each hourly poll which will lower the threshold once events stop occurring. Tested by: Sailaja Bangaru sbappana at yahoo com MFC after: 1 month		2010-05-24 15:45:05 +00:00
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bios
cpufreq
isa	- Implement MI helper functions, dividing one or two timer interrupts with	2010-05-24 11:40:49 +00:00
x86	Add support for corrected machine check interrupts. CMCI is a new local	2010-05-24 15:45:05 +00:00