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d143488650
o many bug fixes o add new periodic calibration api o break up 5416 periodic calibration code in preparation for 928x o move get noise floor to rf backends o 5416-specific ani (still disabled) o modularize 5210 eeprom format a la other eeprom formats o start cleaning up regdomain code o prepare for proper 1/2 and 1/4 width channel support o bring back 900MHz card support o clean up 5212 rf version handling o add 1/2 and 1/4 width channel support for 5212 parts o split 5212 rfgain handling out o improve ani debugging o add AH_USE_INIPDGAIN compile option o purge a bunch of dead 5212 state o add 1/2 and 1/4 rate modes o remove HAL_CAP_CHAN_HALFRATE and HAL_CAP_CHAN_QUARTERRATE; the same info can now be deduced from the set of supported modes
254 lines
7.6 KiB
C
254 lines
7.6 KiB
C
/*
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* Copyright (c) 2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $Id: ah_eeprom_v1.c,v 1.1 2008/11/11 02:40:11 sam Exp $
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_eeprom_v1.h"
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static HAL_STATUS
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v1EepromGet(struct ath_hal *ah, int param, void *val)
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{
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HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom;
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uint32_t sum;
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uint16_t eeval;
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uint8_t *macaddr;
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int i;
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switch (param) {
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case AR_EEP_MACADDR: /* Get MAC Address */
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sum = 0;
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macaddr = val;
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for (i = 0; i < 3; i++) {
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if (!ath_hal_eepromRead(ah, AR_EEPROM_MAC(i), &eeval)) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: cannot read EEPROM location %u\n",
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__func__, i);
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return HAL_EEREAD;
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}
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sum += eeval;
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macaddr[2*i + 0] = eeval >> 8;
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macaddr[2*i + 1] = eeval & 0xff;
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}
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if (sum == 0 || sum == 0xffff*3) {
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad mac address %s\n",
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__func__, ath_hal_ether_sprintf(macaddr));
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return HAL_EEBADMAC;
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}
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return HAL_OK;
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case AR_EEP_REGDMN_0:
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*(uint16_t *) val = ee->ee_regDomain[0];
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return HAL_OK;
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case AR_EEP_RFKILL:
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HALASSERT(val == AH_NULL);
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return ee->ee_rfKill ? HAL_OK : HAL_EIO;
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case AR_EEP_WRITEPROTECT:
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HALASSERT(val == AH_NULL);
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return (ee->ee_protect & AR_EEPROM_PROTOTECT_WP_128_191) ?
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HAL_OK : HAL_EIO;
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default:
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HALASSERT(0);
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return HAL_EINVAL;
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}
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}
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static HAL_BOOL
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v1EepromSet(struct ath_hal *ah, int param, int v)
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{
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return HAL_EINVAL;
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}
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static HAL_BOOL
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v1EepromDiag(struct ath_hal *ah, int request,
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const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
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{
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HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom;
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switch (request) {
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case HAL_DIAG_EEPROM:
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*result = ee;
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*resultsize = sizeof(*ee);
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return AH_TRUE;
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}
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return AH_FALSE;
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}
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static uint16_t
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v1EepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
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{
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return AR_NO_SPUR;
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}
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/*
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* Reclaim any EEPROM-related storage.
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*/
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static void
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v1EepromDetach(struct ath_hal *ah)
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{
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HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom;
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ath_hal_free(ee);
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AH_PRIVATE(ah)->ah_eeprom = AH_NULL;
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}
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HAL_STATUS
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ath_hal_v1EepromAttach(struct ath_hal *ah)
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{
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HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom;
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uint16_t athvals[AR_EEPROM_ATHEROS_MAX]; /* XXX off stack */
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uint16_t protect, version, eeval;
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uint32_t sum;
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int i, loc;
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HALASSERT(ee == AH_NULL);
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if (!ath_hal_eepromRead(ah, AR_EEPROM_MAGIC, &eeval)) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: cannot read EEPROM magic number\n", __func__);
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return HAL_EEREAD;
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}
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if (eeval != 0x5aa5) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: invalid EEPROM magic number 0x%x\n", __func__, eeval);
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return HAL_EEMAGIC;
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}
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if (!ath_hal_eepromRead(ah, AR_EEPROM_PROTECT, &protect)) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: cannot read EEPROM protection bits; read locked?\n",
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__func__);
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return HAL_EEREAD;
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}
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HALDEBUG(ah, HAL_DEBUG_ATTACH, "EEPROM protect 0x%x\n", protect);
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/* XXX check proper access before continuing */
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if (!ath_hal_eepromRead(ah, AR_EEPROM_VERSION, &version)) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: unable to read EEPROM version\n", __func__);
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return HAL_EEREAD;
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}
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if (((version>>12) & 0xf) != 1) {
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/*
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* This code only groks the version 1 EEPROM layout.
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*/
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: unsupported EEPROM version 0x%x found\n",
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__func__, version);
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return HAL_EEVERSION;
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}
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/*
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* Read the Atheros EEPROM entries and calculate the checksum.
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*/
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sum = 0;
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for (i = 0; i < AR_EEPROM_ATHEROS_MAX; i++) {
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if (!ath_hal_eepromRead(ah, AR_EEPROM_ATHEROS(i), &athvals[i]))
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return HAL_EEREAD;
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sum ^= athvals[i];
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}
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if (sum != 0xffff) {
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad EEPROM checksum 0x%x\n",
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__func__, sum);
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return HAL_EEBADSUM;
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}
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/*
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* Valid checksum, fetch the regulatory domain and save values.
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*/
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if (!ath_hal_eepromRead(ah, AR_EEPROM_REG_DOMAIN, &eeval)) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: cannot read regdomain from EEPROM\n", __func__);
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return HAL_EEREAD;
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}
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ee = ath_hal_malloc(sizeof(HAL_EEPROM_v1));
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if (ee == AH_NULL) {
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/* XXX message */
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return HAL_ENOMEM;
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}
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ee->ee_version = version;
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ee->ee_protect = protect;
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ee->ee_antenna = athvals[2];
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ee->ee_biasCurrents = athvals[3];
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ee->ee_thresh62 = athvals[4] & 0xff;
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ee->ee_xlnaOn = (athvals[4] >> 8) & 0xff;
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ee->ee_xpaOn = athvals[5] & 0xff;
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ee->ee_xpaOff = (athvals[5] >> 8) & 0xff;
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ee->ee_regDomain[0] = (athvals[6] >> 8) & 0xff;
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ee->ee_regDomain[1] = athvals[6] & 0xff;
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ee->ee_regDomain[2] = (athvals[7] >> 8) & 0xff;
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ee->ee_regDomain[3] = athvals[7] & 0xff;
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ee->ee_rfKill = athvals[8] & 0x1;
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ee->ee_devType = (athvals[8] >> 1) & 0x7;
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for (i = 0, loc = AR_EEPROM_ATHEROS_TP_SETTINGS; i < AR_CHANNELS_MAX; i++, loc += AR_TP_SETTINGS_SIZE) {
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struct tpcMap *chan = &ee->ee_tpc[i];
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/* Copy pcdac and gain_f values from EEPROM */
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chan->pcdac[0] = (athvals[loc] >> 10) & 0x3F;
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chan->gainF[0] = (athvals[loc] >> 4) & 0x3F;
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chan->pcdac[1] = ((athvals[loc] << 2) & 0x3C)
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| ((athvals[loc+1] >> 14) & 0x03);
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chan->gainF[1] = (athvals[loc+1] >> 8) & 0x3F;
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chan->pcdac[2] = (athvals[loc+1] >> 2) & 0x3F;
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chan->gainF[2] = ((athvals[loc+1] << 4) & 0x30)
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| ((athvals[loc+2] >> 12) & 0x0F);
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chan->pcdac[3] = (athvals[loc+2] >> 6) & 0x3F;
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chan->gainF[3] = athvals[loc+2] & 0x3F;
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chan->pcdac[4] = (athvals[loc+3] >> 10) & 0x3F;
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chan->gainF[4] = (athvals[loc+3] >> 4) & 0x3F;
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chan->pcdac[5] = ((athvals[loc+3] << 2) & 0x3C)
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| ((athvals[loc+4] >> 14) & 0x03);
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chan->gainF[5] = (athvals[loc+4] >> 8) & 0x3F;
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chan->pcdac[6] = (athvals[loc+4] >> 2) & 0x3F;
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chan->gainF[6] = ((athvals[loc+4] << 4) & 0x30)
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| ((athvals[loc+5] >> 12) & 0x0F);
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chan->pcdac[7] = (athvals[loc+5] >> 6) & 0x3F;
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chan->gainF[7] = athvals[loc+5] & 0x3F;
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chan->pcdac[8] = (athvals[loc+6] >> 10) & 0x3F;
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chan->gainF[8] = (athvals[loc+6] >> 4) & 0x3F;
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chan->pcdac[9] = ((athvals[loc+6] << 2) & 0x3C)
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| ((athvals[loc+7] >> 14) & 0x03);
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chan->gainF[9] = (athvals[loc+7] >> 8) & 0x3F;
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chan->pcdac[10] = (athvals[loc+7] >> 2) & 0x3F;
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chan->gainF[10] = ((athvals[loc+7] << 4) & 0x30)
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| ((athvals[loc+8] >> 12) & 0x0F);
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/* Copy Regulatory Domain and Rate Information from EEPROM */
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chan->rate36 = (athvals[loc+8] >> 6) & 0x3F;
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chan->rate48 = athvals[loc+8] & 0x3F;
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chan->rate54 = (athvals[loc+9] >> 10) & 0x3F;
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chan->regdmn[0] = (athvals[loc+9] >> 4) & 0x3F;
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chan->regdmn[1] = ((athvals[loc+9] << 2) & 0x3C)
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| ((athvals[loc+10] >> 14) & 0x03);
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chan->regdmn[2] = (athvals[loc+10] >> 8) & 0x3F;
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chan->regdmn[3] = (athvals[loc+10] >> 2) & 0x3F;
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}
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AH_PRIVATE(ah)->ah_eeprom = ee;
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AH_PRIVATE(ah)->ah_eeversion = version;
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AH_PRIVATE(ah)->ah_eepromDetach = v1EepromDetach;
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AH_PRIVATE(ah)->ah_eepromGet = v1EepromGet;
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AH_PRIVATE(ah)->ah_eepromSet = v1EepromSet;
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AH_PRIVATE(ah)->ah_getSpurChan = v1EepromGetSpurChan;
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AH_PRIVATE(ah)->ah_eepromDiag = v1EepromDiag;
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return HAL_OK;
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}
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