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446188d1e6
offset parameter has vm_offset_t type in calling code and in kobj method Reviewed by: imp, rnoland, lulf, current@ Approved by: jhb (mentor)
418 lines
10 KiB
C
418 lines
10 KiB
C
/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <dev/agp/agppriv.h>
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#include <dev/agp/agpreg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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MALLOC_DECLARE(M_AGP);
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#define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off)
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#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
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#define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v)
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#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
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struct agp_amd_gatt {
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u_int32_t ag_entries;
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u_int32_t *ag_virtual; /* virtual address of gatt */
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vm_offset_t ag_physical;
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u_int32_t *ag_vdir; /* virtual address of page dir */
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vm_offset_t ag_pdir; /* physical address of page dir */
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};
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struct agp_amd_softc {
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struct agp_softc agp;
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struct resource *regs; /* memory mapped control registers */
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bus_space_tag_t bst; /* bus_space tag */
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bus_space_handle_t bsh; /* bus_space handle */
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_amd_gatt *gatt;
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};
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static struct agp_amd_gatt *
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agp_amd_alloc_gatt(device_t dev)
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{
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u_int32_t apsize = AGP_GET_APERTURE(dev);
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u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
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struct agp_amd_gatt *gatt;
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int i, npages, pdir_offset;
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if (bootverbose)
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device_printf(dev,
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"allocating GATT for aperture of size %dM\n",
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apsize / (1024*1024));
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gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
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if (!gatt)
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return 0;
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/*
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* The AMD751 uses a page directory to map a non-contiguous
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* gatt so we don't need to use contigmalloc.
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* Malloc individual gatt pages and map them into the page
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* directory.
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*/
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gatt->ag_entries = entries;
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gatt->ag_virtual = malloc(entries * sizeof(u_int32_t),
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M_AGP, M_NOWAIT);
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if (!gatt->ag_virtual) {
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if (bootverbose)
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device_printf(dev, "allocation failed\n");
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free(gatt, M_AGP);
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return 0;
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}
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bzero(gatt->ag_virtual, entries * sizeof(u_int32_t));
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/*
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* Allocate the page directory.
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*/
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gatt->ag_vdir = malloc(AGP_PAGE_SIZE, M_AGP, M_NOWAIT);
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if (!gatt->ag_vdir) {
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if (bootverbose)
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device_printf(dev,
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"failed to allocate page directory\n");
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free(gatt->ag_virtual, M_AGP);
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free(gatt, M_AGP);
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return 0;
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}
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bzero(gatt->ag_vdir, AGP_PAGE_SIZE);
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gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir);
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if(bootverbose)
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device_printf(dev, "gatt -> ag_pdir %#lx\n",
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(u_long)gatt->ag_pdir);
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/*
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* Allocate the gatt pages
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*/
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gatt->ag_entries = entries;
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if(bootverbose)
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device_printf(dev, "allocating GATT for %d AGP page entries\n",
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gatt->ag_entries);
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gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
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/*
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* Map the pages of the GATT into the page directory.
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*
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* The GATT page addresses are mapped into the directory offset by
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* an amount dependent on the base address of the aperture. This
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* is and offset into the page directory, not an offset added to
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* the addresses of the gatt pages.
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*/
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pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22;
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npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
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>> AGP_PAGE_SHIFT);
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for (i = 0; i < npages; i++) {
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vm_offset_t va;
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vm_offset_t pa;
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va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE;
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pa = vtophys(va);
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gatt->ag_vdir[i + pdir_offset] = pa | 1;
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}
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/*
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* Make sure the chipset can see everything.
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*/
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agp_flush_cache();
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return gatt;
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}
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static void
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agp_amd_free_gatt(struct agp_amd_gatt *gatt)
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{
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free(gatt->ag_virtual, M_AGP);
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free(gatt->ag_vdir, M_AGP);
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free(gatt, M_AGP);
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}
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static const char*
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agp_amd_match(device_t dev)
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{
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if (pci_get_class(dev) != PCIC_BRIDGE
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|| pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
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return NULL;
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if (agp_find_caps(dev) == 0)
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return NULL;
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switch (pci_get_devid(dev)) {
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case 0x70061022:
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return ("AMD 751 host to AGP bridge");
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case 0x700e1022:
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return ("AMD 761 host to AGP bridge");
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case 0x700c1022:
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return ("AMD 762 host to AGP bridge");
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};
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return NULL;
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}
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static int
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agp_amd_probe(device_t dev)
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{
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const char *desc;
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if (resource_disabled("agp", device_get_unit(dev)))
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return (ENXIO);
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desc = agp_amd_match(dev);
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if (desc) {
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device_set_desc(dev, desc);
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return BUS_PROBE_DEFAULT;
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}
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return ENXIO;
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}
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static int
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agp_amd_attach(device_t dev)
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{
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struct agp_amd_softc *sc = device_get_softc(dev);
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struct agp_amd_gatt *gatt;
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int error, rid;
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error = agp_generic_attach(dev);
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if (error)
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return error;
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rid = AGP_AMD751_REGISTERS;
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sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->regs) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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sc->bst = rman_get_bustag(sc->regs);
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sc->bsh = rman_get_bushandle(sc->regs);
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sc->initial_aperture = AGP_GET_APERTURE(dev);
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for (;;) {
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gatt = agp_amd_alloc_gatt(dev);
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if (gatt)
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break;
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/*
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* Probably contigmalloc failure. Try reducing the
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* aperture so that the gatt size reduces.
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*/
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if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2))
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return ENOMEM;
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}
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sc->gatt = gatt;
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/* Install the gatt. */
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WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir);
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/* Enable synchronisation between host and agp. */
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pci_write_config(dev,
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AGP_AMD751_MODECTRL,
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AGP_AMD751_MODECTRL_SYNEN, 1);
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/* Set indexing mode for two-level and enable page dir cache */
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pci_write_config(dev,
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AGP_AMD751_MODECTRL2,
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AGP_AMD751_MODECTRL2_GPDCE, 1);
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/* Enable the TLB and flush */
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WRITE2(AGP_AMD751_STATUS,
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READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
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AGP_FLUSH_TLB(dev);
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return 0;
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}
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static int
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agp_amd_detach(device_t dev)
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{
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struct agp_amd_softc *sc = device_get_softc(dev);
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agp_free_cdev(dev);
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/* Disable the TLB.. */
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WRITE2(AGP_AMD751_STATUS,
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READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
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/* Disable host-agp sync */
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pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1);
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/* Clear the GATT base */
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WRITE4(AGP_AMD751_ATTBASE, 0);
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/* Put the aperture back the way it started. */
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AGP_SET_APERTURE(dev, sc->initial_aperture);
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agp_amd_free_gatt(sc->gatt);
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agp_free_res(dev);
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bus_release_resource(dev, SYS_RES_MEMORY,
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AGP_AMD751_REGISTERS, sc->regs);
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return 0;
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}
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static u_int32_t
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agp_amd_get_aperture(device_t dev)
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{
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int vas;
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/*
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* The aperture size is equal to 32M<<vas.
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*/
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vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1;
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return (32*1024*1024) << vas;
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}
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static int
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agp_amd_set_aperture(device_t dev, u_int32_t aperture)
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{
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int vas;
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/*
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* Check for a power of two and make sure its within the
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* programmable range.
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*/
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if (aperture & (aperture - 1)
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|| aperture < 32*1024*1024
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|| aperture > 2U*1024*1024*1024)
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return EINVAL;
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vas = ffs(aperture / 32*1024*1024) - 1;
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/*
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* While the size register is bits 1-3 of APCTRL, bit 0 must be
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* set for the size value to be 'valid'
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*/
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pci_write_config(dev, AGP_AMD751_APCTRL,
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(((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06)
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| ((vas << 1) | 1))), 1);
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return 0;
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}
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static int
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agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
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{
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struct agp_amd_softc *sc = device_get_softc(dev);
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if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
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/* invalidate the cache */
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AGP_FLUSH_TLB(dev);
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return 0;
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}
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static int
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agp_amd_unbind_page(device_t dev, vm_offset_t offset)
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{
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struct agp_amd_softc *sc = device_get_softc(dev);
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if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
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return 0;
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}
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static void
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agp_amd_flush_tlb(device_t dev)
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{
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struct agp_amd_softc *sc = device_get_softc(dev);
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/* Set the cache invalidate bit and wait for the chipset to clear */
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WRITE4(AGP_AMD751_TLBCTRL, 1);
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do {
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DELAY(1);
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} while (READ4(AGP_AMD751_TLBCTRL));
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}
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static device_method_t agp_amd_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, agp_amd_probe),
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DEVMETHOD(device_attach, agp_amd_attach),
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DEVMETHOD(device_detach, agp_amd_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* AGP interface */
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DEVMETHOD(agp_get_aperture, agp_amd_get_aperture),
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DEVMETHOD(agp_set_aperture, agp_amd_set_aperture),
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DEVMETHOD(agp_bind_page, agp_amd_bind_page),
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DEVMETHOD(agp_unbind_page, agp_amd_unbind_page),
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DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb),
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DEVMETHOD(agp_enable, agp_generic_enable),
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DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory),
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DEVMETHOD(agp_free_memory, agp_generic_free_memory),
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DEVMETHOD(agp_bind_memory, agp_generic_bind_memory),
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DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory),
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{ 0, 0 }
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};
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static driver_t agp_amd_driver = {
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"agp",
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agp_amd_methods,
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sizeof(struct agp_amd_softc),
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};
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static devclass_t agp_devclass;
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DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, agp_devclass, 0, 0);
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MODULE_DEPEND(agp_amd, agp, 1, 1, 1);
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MODULE_DEPEND(agp_amd, pci, 1, 1, 1);
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