Neel Natu 69a5a0bfea Sibyte provides a 64-bit read-only counter that counts at half the processor ... frequency. This counter can be accessed coherently from both cores. Use this as the preferred timecounter for the SWARM kernels. The CP0 COUNT register is unusable as the timecounter on SMP platforms because the COUNT registers on different CPUs are not guaranteed to be in sync.		2010-03-20 05:49:06 +00:00
..
adm5120	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
alchemy	Hack to make ALCHEMY compile again...	2010-02-18 19:41:38 +00:00
atheros	Define DMA_RX_STATUS_OVERFLOW with correct value.	2010-02-19 17:37:46 +00:00
cavium	o) Use octeon_fpa_alloc_phys in a situation in which we don't need a usable	2010-03-13 04:55:47 +00:00
compile
conf	Go ahead and add USB support to the generic config.	2010-03-14 19:04:42 +00:00
idt	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
include	Sibyte provides a 64-bit read-only counter that counts at half the processor	2010-03-20 05:49:06 +00:00
malta	The NetBSD Foundation has granted permission to remove clause 3 and 4 from	2010-03-03 17:55:51 +00:00
mips	Sibyte provides a 64-bit read-only counter that counts at half the processor	2010-03-20 05:49:06 +00:00
rmi	The NetBSD Foundation has granted permission to remove clause 3 and 4 from	2010-03-03 17:55:51 +00:00
sentry5	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
sibyte	Sibyte provides a 64-bit read-only counter that counts at half the processor	2010-03-20 05:49:06 +00:00