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256 lines
7.4 KiB
C
256 lines
7.4 KiB
C
/*-
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* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
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* Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Driver for GPIB cards based on NEC µPD7210 and compatibles.
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*
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* This driver just hooks up to the hardware and leaves all the interesting
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* stuff to upd7210.c.
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*
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* Supported hardware:
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* PCIIA compatible cards.
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*
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* Tested and known working:
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* "B&C Microsystems PC488A-0"
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* "National Instruments GPIB-PCII/PCIIA" (in PCIIa mode)
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* "Axiom AX5488"
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <isa/isavar.h>
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#define UPD7210_HW_DRIVER
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#include <dev/ieee488/upd7210.h>
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struct pcii_softc {
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int foo;
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struct resource *res[11];
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void *intr_handler;
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struct upd7210 upd7210;
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};
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static devclass_t pcii_devclass;
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static int pcii_probe(device_t dev);
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static int pcii_attach(device_t dev);
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static device_method_t pcii_methods[] = {
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DEVMETHOD(device_probe, pcii_probe),
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DEVMETHOD(device_attach, pcii_attach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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{ 0, 0 }
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};
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static struct resource_spec pcii_res_spec[] = {
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
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{ SYS_RES_DRQ, 0, RF_ACTIVE | RF_SHAREABLE | RF_OPTIONAL},
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{ SYS_RES_IOPORT, 0, RF_ACTIVE},
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{ SYS_RES_IOPORT, 1, RF_ACTIVE},
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{ SYS_RES_IOPORT, 2, RF_ACTIVE},
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{ SYS_RES_IOPORT, 3, RF_ACTIVE},
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{ SYS_RES_IOPORT, 4, RF_ACTIVE},
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{ SYS_RES_IOPORT, 5, RF_ACTIVE},
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{ SYS_RES_IOPORT, 6, RF_ACTIVE},
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{ SYS_RES_IOPORT, 7, RF_ACTIVE},
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{ SYS_RES_IOPORT, 8, RF_ACTIVE | RF_SHAREABLE},
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{ -1, 0, 0 }
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};
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static driver_t pcii_driver = {
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"pcii",
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pcii_methods,
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sizeof(struct pcii_softc),
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};
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static int
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pcii_probe(device_t dev)
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{
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int rid, i, j;
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u_long start, count, addr;
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int error = 0;
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struct pcii_softc *sc;
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device_set_desc(dev, "PCII IEEE-4888 controller");
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sc = device_get_softc(dev);
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rid = 0;
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if (bus_get_resource(dev, SYS_RES_IOPORT, rid, &start, &count) != 0)
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return ENXIO;
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/*
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* The PCIIA decodes a fixed pattern of 0x2e1 for the lower 10
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* address bits A0 ... A9. Bits A10 through A12 are used by
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* the µPD7210 register select lines. This makes the
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* individual 7210 register being 0x400 bytes apart in the ISA
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* bus address space. Address bits A13 and A14 are compared
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* to a DIP switch setting on the card, allowing for up to 4
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* different cards being installed (at base addresses 0x2e1,
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* 0x22e1, 0x42e1, and 0x62e1, respectively). A15 has been
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* used to select an optional on-board time-of-day clock chip
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* (MM58167A) on the original PCIIA rather than the µPD7210
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* (which is not implemented on later boards). The
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* documentation states the respective addresses for that chip
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* should be handled as reserved addresses, which we don't do
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* (right now). Finally, the IO addresses 0x2f0 ... 0x2f7 for
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* a "special interrupt handling feature" (re-enable
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* interrupts so the IRQ can be shared).
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*
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* Usually, the user will only set the base address in the
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* device hints, so we handle the rest here.
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*
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* (Source: GPIB-PCIIA Technical Reference Manual, September
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* 1989 Edition, National Instruments.)
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*/
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if ((start & 0x3ff) != 0x2e1) {
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if (bootverbose)
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printf("pcii_probe: PCIIA base address 0x%lx not "
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"0x2e1/0x22e1/0x42e1/0x62e1\n",
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start);
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return (ENXIO);
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}
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for (rid = 0, addr = start; rid < 8; rid++, addr += 0x400) {
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if (bus_set_resource(dev, SYS_RES_IOPORT, rid, addr, 1) != 0) {
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printf("pcii_probe: could not set IO port 0x%lx\n",
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addr);
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return (ENXIO);
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}
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}
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if (bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &count) != 0) {
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printf("pcii_probe: cannot obtain IRQ level\n");
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return ENXIO;
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}
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if (start > 7) {
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printf("pcii_probe: IRQ level %lu too high\n", start);
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return ENXIO;
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}
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if (bus_set_resource(dev, SYS_RES_IOPORT, 8, 0x2f0 + start, 1) != 0) {
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printf("pcii_probe: could not set IO port 0x%3lx\n",
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0x2f0 + start);
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return (ENXIO);
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}
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error = bus_alloc_resources(dev, pcii_res_spec, sc->res);
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if (error) {
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printf("pcii_probe: Could not allocate resources\n");
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return (error);
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}
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error = ENXIO;
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/*
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* Perform some basic tests on the µPD7210 registers. At
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* least *some* register must read different from 0x00 or
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* 0xff.
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*/
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for (i = 0; i < 8; i++) {
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j = bus_read_1(sc->res[2 + i], 0);
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if (j != 0x00 && j != 0xff)
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error = 0;
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}
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/* SPSR/SPMR read/write test */
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if (!error) {
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bus_write_1(sc->res[2 + 3], 0, 0x55);
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if (bus_read_1(sc->res[2 + 3], 0) != 0x55)
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error = ENXIO;
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}
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if (!error) {
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bus_write_1(sc->res[2 + 3], 0, 0xaa);
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if (bus_read_1(sc->res[2 + 3], 0) != 0xaa)
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error = ENXIO;
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}
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if (error)
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printf("pcii_probe: probe failure\n");
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bus_release_resources(dev, pcii_res_spec, sc->res);
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return (error);
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}
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static int
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pcii_attach(device_t dev)
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{
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struct pcii_softc *sc;
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u_long start, count;
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int unit;
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int rid;
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int error = 0;
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unit = device_get_unit(dev);
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sc = device_get_softc(dev);
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memset(sc, 0, sizeof *sc);
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device_set_desc(dev, "PCII IEEE-4888 controller");
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if (bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &count) != 0) {
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printf("pcii_attach: cannot obtain IRQ number\n");
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return ENXIO;
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}
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error = bus_alloc_resources(dev, pcii_res_spec, sc->res);
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if (error)
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return (error);
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error = bus_setup_intr(dev, sc->res[0],
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INTR_TYPE_MISC | INTR_MPSAFE, NULL,
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upd7210intr, &sc->upd7210, &sc->intr_handler);
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if (error) {
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bus_release_resources(dev, pcii_res_spec, sc->res);
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return (error);
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}
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for (rid = 0; rid < 8; rid++) {
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sc->upd7210.reg_res[rid] = sc->res[2 + rid];
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sc->upd7210.reg_offset[rid] = 0;
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}
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sc->upd7210.irq_clear_res = sc->res[10];
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sc->upd7210.use_fifo = 0;
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if (sc->res[1] == NULL)
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sc->upd7210.dmachan = -1;
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else
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sc->upd7210.dmachan = rman_get_start(sc->res[1]);
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upd7210attach(&sc->upd7210);
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device_printf(dev, "attached gpib%d\n", sc->upd7210.unit);
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return (0);
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}
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DRIVER_MODULE(pcii, isa, pcii_driver, pcii_devclass, 0, 0);
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DRIVER_MODULE(pcii, acpi, pcii_driver, pcii_devclass, 0, 0);
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