mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-24 11:29:10 +00:00
482 lines
12 KiB
C
482 lines
12 KiB
C
/*-
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* Copyright (c) 2012, 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Oleksandr Rybalko under sponsorship
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* from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Freescale i.MX515 GPIO driver.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "gpio_if.h"
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#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define GPIO_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx, \
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device_get_nameunit(_sc->sc_dev), "imx_gpio", MTX_DEF)
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#define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
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#define GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
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#define GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
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#define WRITE4(_sc, _r, _v) \
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bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r), (_v))
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#define READ4(_sc, _r) \
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bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r))
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#define SET4(_sc, _r, _m) \
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WRITE4((_sc), (_r), READ4((_sc), (_r)) | (_m))
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#define CLEAR4(_sc, _r, _m) \
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WRITE4((_sc), (_r), READ4((_sc), (_r)) & ~(_m))
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/* Registers definition for Freescale i.MX515 GPIO controller */
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#define IMX_GPIO_DR_REG 0x000 /* Pin Data */
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#define IMX_GPIO_OE_REG 0x004 /* Set Pin Output */
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#define IMX_GPIO_PSR_REG 0x008 /* Pad Status */
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#define IMX_GPIO_ICR1_REG 0x00C /* Interrupt Configuration */
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#define IMX_GPIO_ICR2_REG 0x010 /* Interrupt Configuration */
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#define GPIO_ICR_COND_LOW 0
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#define GPIO_ICR_COND_HIGH 1
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#define GPIO_ICR_COND_RISE 2
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#define GPIO_ICR_COND_FALL 3
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#define IMX_GPIO_IMR_REG 0x014 /* Interrupt Mask Register */
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#define IMX_GPIO_ISR_REG 0x018 /* Interrupt Status Register */
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#define IMX_GPIO_EDGE_REG 0x01C /* Edge Detect Register */
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#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
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#define NGPIO 32
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struct imx51_gpio_softc {
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device_t dev;
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struct mtx sc_mtx;
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struct resource *sc_res[11]; /* 1 x mem, 2 x IRQ, 8 x IRQ */
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void *gpio_ih[11]; /* 1 ptr is not a big waste */
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int sc_l_irq; /* Last irq resource */
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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int gpio_npins;
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struct gpio_pin gpio_pins[NGPIO];
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};
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static struct resource_spec imx_gpio_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 1, RF_ACTIVE },
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{ -1, 0 }
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};
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static struct resource_spec imx_gpio0irq_spec[] = {
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{ SYS_RES_IRQ, 2, RF_ACTIVE },
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{ SYS_RES_IRQ, 3, RF_ACTIVE },
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{ SYS_RES_IRQ, 4, RF_ACTIVE },
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{ SYS_RES_IRQ, 5, RF_ACTIVE },
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{ SYS_RES_IRQ, 6, RF_ACTIVE },
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{ SYS_RES_IRQ, 7, RF_ACTIVE },
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{ SYS_RES_IRQ, 8, RF_ACTIVE },
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{ SYS_RES_IRQ, 9, RF_ACTIVE },
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{ -1, 0 }
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};
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/*
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* Helpers
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*/
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static void imx51_gpio_pin_configure(struct imx51_gpio_softc *,
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struct gpio_pin *, uint32_t);
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/*
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* Driver stuff
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*/
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static int imx51_gpio_probe(device_t);
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static int imx51_gpio_attach(device_t);
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static int imx51_gpio_detach(device_t);
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static int imx51_gpio_intr(void *);
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/*
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* GPIO interface
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*/
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static int imx51_gpio_pin_max(device_t, int *);
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static int imx51_gpio_pin_getcaps(device_t, uint32_t, uint32_t *);
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static int imx51_gpio_pin_getflags(device_t, uint32_t, uint32_t *);
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static int imx51_gpio_pin_getname(device_t, uint32_t, char *);
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static int imx51_gpio_pin_setflags(device_t, uint32_t, uint32_t);
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static int imx51_gpio_pin_set(device_t, uint32_t, unsigned int);
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static int imx51_gpio_pin_get(device_t, uint32_t, unsigned int *);
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static int imx51_gpio_pin_toggle(device_t, uint32_t pin);
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static void
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imx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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GPIO_LOCK(sc);
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/*
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* Manage input/output
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*/
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if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
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pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT) {
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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SET4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin));
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}
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else {
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pin->gp_flags |= GPIO_PIN_INPUT;
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CLEAR4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin));
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}
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}
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GPIO_UNLOCK(sc);
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}
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static int
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imx51_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = NGPIO - 1;
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return (0);
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}
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static int
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imx51_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*caps = sc->gpio_pins[i].gp_caps;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*flags = sc->gpio_pins[i].gp_flags;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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/* Check for unwanted flags. */
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if ((flags & sc->gpio_pins[i].gp_caps) != flags)
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return (EINVAL);
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/* Can't mix input/output together */
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if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
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(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
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return (EINVAL);
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imx51_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
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return (0);
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}
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static int
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imx51_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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if (value)
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SET4(sc, IMX_GPIO_DR_REG, (1 << i));
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else
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CLEAR4(sc, IMX_GPIO_DR_REG, (1 << i));
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*val = (READ4(sc, IMX_GPIO_DR_REG) >> i) & 1;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct imx51_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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WRITE4(sc, IMX_GPIO_DR_REG,
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(READ4(sc, IMX_GPIO_DR_REG) ^ (1 << i)));
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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imx51_gpio_intr(void *arg)
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{
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struct imx51_gpio_softc *sc;
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uint32_t input, value;
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sc = arg;
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input = READ4(sc, IMX_GPIO_ISR_REG);
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value = input & READ4(sc, IMX_GPIO_IMR_REG);
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WRITE4(sc, IMX_GPIO_DR_REG, input);
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if (!value)
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goto intr_done;
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/* TODO: interrupt handling */
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intr_done:
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return (FILTER_HANDLED);
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}
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static int
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imx51_gpio_probe(device_t dev)
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{
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if (ofw_bus_is_compatible(dev, "fsl,imx51-gpio")) {
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device_set_desc(dev, "i.MX515 GPIO Controller");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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imx51_gpio_attach(device_t dev)
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{
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struct imx51_gpio_softc *sc;
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int i, irq;
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sc = device_get_softc(dev);
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mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
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if (bus_alloc_resources(dev, imx_gpio_spec, sc->sc_res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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sc->dev = dev;
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sc->gpio_npins = NGPIO;
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sc->sc_l_irq = 2;
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sc->sc_iot = rman_get_bustag(sc->sc_res[0]);
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sc->sc_ioh = rman_get_bushandle(sc->sc_res[0]);
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if (bus_alloc_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]) == 0) {
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/*
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* First GPIO unit able to serve +8 interrupts for 8 first
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* pins.
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*/
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sc->sc_l_irq = 10;
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}
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for (irq = 1; irq <= sc->sc_l_irq; irq ++) {
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if ((bus_setup_intr(dev, sc->sc_res[irq], INTR_TYPE_MISC,
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imx51_gpio_intr, NULL, sc, &sc->gpio_ih[irq]))) {
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device_printf(dev,
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"WARNING: unable to register interrupt handler\n");
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return (ENXIO);
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}
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}
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for (i = 0; i < sc->gpio_npins; i++) {
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sc->gpio_pins[i].gp_pin = i;
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sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
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sc->gpio_pins[i].gp_flags =
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(READ4(sc, IMX_GPIO_OE_REG) & (1 << i)) ? GPIO_PIN_OUTPUT:
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GPIO_PIN_INPUT;
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snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
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"imx_gpio%d.%d", device_get_unit(dev), i);
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}
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device_add_child(dev, "gpioc", device_get_unit(dev));
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device_add_child(dev, "gpiobus", device_get_unit(dev));
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return (bus_generic_attach(dev));
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}
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static int
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imx51_gpio_detach(device_t dev)
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{
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struct imx51_gpio_softc *sc;
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sc = device_get_softc(dev);
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KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized"));
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bus_generic_detach(dev);
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if (sc->sc_res[3])
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bus_release_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]);
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if (sc->sc_res[0])
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bus_release_resources(dev, imx_gpio_spec, sc->sc_res);
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mtx_destroy(&sc->sc_mtx);
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return(0);
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}
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static device_method_t imx51_gpio_methods[] = {
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DEVMETHOD(device_probe, imx51_gpio_probe),
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DEVMETHOD(device_attach, imx51_gpio_attach),
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DEVMETHOD(device_detach, imx51_gpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_pin_max, imx51_gpio_pin_max),
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DEVMETHOD(gpio_pin_getname, imx51_gpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, imx51_gpio_pin_getflags),
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DEVMETHOD(gpio_pin_getcaps, imx51_gpio_pin_getcaps),
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DEVMETHOD(gpio_pin_setflags, imx51_gpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, imx51_gpio_pin_get),
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DEVMETHOD(gpio_pin_set, imx51_gpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, imx51_gpio_pin_toggle),
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{0, 0},
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};
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static driver_t imx51_gpio_driver = {
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"gpio",
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imx51_gpio_methods,
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sizeof(struct imx51_gpio_softc),
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};
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static devclass_t imx51_gpio_devclass;
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DRIVER_MODULE(imx51_gpio, simplebus, imx51_gpio_driver, imx51_gpio_devclass,
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0, 0);
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