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f7faedb40d
Don't declare _i586_ctr_bias. The usual style, which was followed in microtime.s, is to omit extern declarations.
186 lines
6.8 KiB
ArmAsm
186 lines
6.8 KiB
ArmAsm
/*-
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* Copyright (c) 1993 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Steve McCanne's microtime code
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* $Id: microtime.s,v 1.9 1995/10/13 19:53:25 wollman Exp $
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*/
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#include <machine/asmacros.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/timerreg.h>
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ENTRY(microtime)
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#ifdef I586_CPU
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movl _pentium_mhz, %ecx
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testl %ecx, %ecx
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jne pentium_microtime
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#else
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xorl %ecx, %ecx # clear ecx
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#endif
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movb $TIMER_SEL0|TIMER_LATCH, %al # prepare to latch
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cli # disable interrupts
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outb %al, $TIMER_MODE # latch timer 0's counter
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inb $TIMER_CNTR0, %al # read counter value, LSB first
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movb %al, %cl
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inb $TIMER_CNTR0, %al
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movb %al, %ch
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# Now check for counter overflow. This is tricky because the
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# timer chip doesn't let us atomically read the current counter
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# value and the output state (i.e., overflow state). We have
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# to read the ICU interrupt request register (IRR) to see if the
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# overflow has occured. Because we lack atomicity, we use
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# the (very accurate) heuristic that we only check for
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# overflow if the value read is close to the interrupt period.
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# E.g., if we just checked the IRR, we might read a non-overflowing
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# value close to 0, experience overflow, then read this overflow
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# from the IRR, and mistakenly add a correction to the "close
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# to zero" value.
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#
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# We compare the counter value to the prepared overflow threshold.
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# If the counter value is less than this, we assume the counter
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# didn't overflow between disabling timer interrupts and latching
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# the counter value above. For example, we assume that interrupts
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# are enabled when we are called (or were disabled just a few
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# cycles before we are called and that the instructions before the
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# "cli" are fast) and that the "cli" and "outb" instructions take
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# less than 10 timer cycles to execute. The last assumption is
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# very safe.
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#
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# Otherwise, the counter might have overflowed. We check for this
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# condition by reading the interrupt request register out of the ICU.
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# If it overflowed, we add in one clock period.
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#
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# The heuristic is "very accurate" because it works 100% if we're
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# called with interrupts enabled. Otherwise, it might not work.
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# Currently, only siointrts() calls us with interrupts disabled, so
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# the problem can be avoided at some cost to the general case. The
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# costs are complications in callers to disable interrupts in
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# IO_ICU1 and extra reads of the IRR forced by a conservative
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# overflow threshold.
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#
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# In 2.0, we are called at splhigh() from mi_switch(), so we have
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# to allow for the overflow bit being in ipending instead of in
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# the IRR. Our caller may have executed many instructions since
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# ipending was set, so the heuristic for the IRR is inappropriate
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# for ipending. However, we don't need another heuristic, since
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# the "cli" suffices to lock ipending.
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movl _timer0_max_count, %edx # prepare for 2 uses
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testb $IRQ0, _ipending # is a soft timer interrupt pending?
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jne overflow
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# Do we have a possible overflow condition?
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cmpl _timer0_overflow_threshold, %ecx
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jbe 1f
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inb $IO_ICU1, %al # read IRR in ICU
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testb $IRQ0, %al # is a hard timer interrupt pending?
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je 1f
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overflow:
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subl %edx, %ecx # some intr pending, count timer down through 0
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1:
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# Subtract counter value from max count since it is a count-down value.
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subl %ecx, %edx
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# Adjust for partial ticks.
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addl _timer0_prescaler_count, %edx
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# To divide by 1.193200, we multiply by 27465 and shift right by 15.
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#
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# The multiplier was originally calculated to be
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#
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# 2^18 * 1000000 / 1193200 = 219698.
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#
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# The frequency is 1193200 to be compatible with rounding errors in
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# the calculation of the usual maximum count. 2^18 is the largest
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# power of 2 such that multiplying `i' by it doesn't overflow for i
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# in the range of interest ([0, 11932 + 5)). We adjusted the
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# multiplier a little to minimise the average of
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#
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# fabs(i / 1.1193200 - ((multiplier * i) >> 18))
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#
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# for i in the range and then removed powers of 2 to speed up the
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# multiplication and to avoid overflow for i outside the range
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# (i may be as high as 2^17 if the timer is programmed to its
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# maximum maximum count). The absolute error is less than 1 for
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# all i in the range.
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#if 0
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imul $27645, %edx # 25 cycles on a 486
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#else
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leal (%edx,%edx,2), %eax # a = 3 2 cycles on a 486
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leal (%edx,%eax,4), %eax # a = 13 2
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movl %eax, %ecx # c = 13 1
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shl $5, %eax # a = 416 2
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addl %ecx, %eax # a = 429 1
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leal (%edx,%eax,8), %eax # a = 3433 2
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leal (%edx,%eax,8), %eax # a = 27465 2 (total 12 cycles)
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#endif /* 0 */
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shr $15, %eax
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common_microtime:
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addl _time+4, %eax # usec += time.tv_sec
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movl _time, %edx # sec = time.tv_sec
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sti # enable interrupts
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cmpl $1000000, %eax # usec valid?
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jb 1f
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subl $1000000, %eax # adjust usec
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incl %edx # bump sec
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1:
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movl 4(%esp), %ecx # load timeval pointer arg
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movl %edx, (%ecx) # tvp->tv_sec = sec
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movl %eax, 4(%ecx) # tvp->tv_usec = usec
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ret
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#ifdef I586_CPU
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ALIGN_TEXT
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pentium_microtime:
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cli
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.byte 0x0f, 0x31 # RDTSC
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subl _i586_ctr_bias, %eax
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sbbl _i586_ctr_bias+4, %edx
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divl %ecx # get value in usec
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jmp common_microtime
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#endif
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