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991554f2c4
This is derived from the mps(4) driver, but it supports only the 12Gb IT and IR hardware including the SAS 3004, SAS 3008 and SAS 3108. Some notes about this driver: o The 12Gb hardware can do "FastPath" I/O, and that capability is included in this driver. o WarpDrive functionality has been removed, since it isn't supported in the 12Gb driver interface. o The Scatter/Gather list handling code is significantly different between the 6Gb and 12Gb hardware. The 12Gb boards support IEEE Scatter/Gather lists. Thanks to LSI for developing and testing this driver for FreeBSD. share/man/man4/mpr.4: mpr(4) man page. sys/dev/mpr/*: mpr(4) driver files. sys/modules/Makefile, sys/modules/mpr/Makefile: Add a module Makefile for the mpr(4) driver. sys/conf/files: Add the mpr(4) driver. sys/amd64/conf/GENERIC, sys/i386/conf/GENERIC, sys/mips/conf/OCTEON1, sys/sparc64/conf/GENERIC: Add the mpr(4) driver to all config files that currently have the mps(4) driver. sys/ia64/conf/GENERIC: Add the mps(4) and mpr(4) drivers to the ia64 GENERIC config file. sys/i386/conf/XEN: Exclude the mpr module from building here. Submitted by: Steve McConnell <Stephen.McConnell@lsi.com> MFC after: 3 days Tested by: Chris Reeves <chrisr@spectralogic.com> Sponsored by: LSI, Spectra Logic Relnotes: LSI 12Gb SAS driver mpr(4) added
119 lines
5.3 KiB
C
119 lines
5.3 KiB
C
/*-
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* Copyright (c) 2013 LSI Corp.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* LSI MPT-Fusion Host Adapter FreeBSD
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*
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* $FreeBSD$
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*/
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/*
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* Copyright (c) 2009 LSI Corporation.
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*
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*
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* Name: mpi2_ra.h
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* Title: MPI RAID Accelerator messages and structures
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* Creation Date: April 13, 2009
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*
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* mpi2_ra.h Version: 02.00.00
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*
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* Version History
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* ---------------
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*
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* Date Version Description
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* -------- -------- ------------------------------------------------------
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* 05-06-09 02.00.00 Initial version.
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* --------------------------------------------------------------------------
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*/
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#ifndef MPI2_RA_H
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#define MPI2_RA_H
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/* generic structure for RAID Accelerator Control Block */
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typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
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{
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U32 Reserved[8]; /* 0x00 */
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U32 RaidAcceleratorCDB[1]; /* 0x20 */
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} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
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MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
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Mpi2RAIDAcceleratorControlBlock_t,
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MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
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/******************************************************************************
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*
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* RAID Accelerator Messages
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*
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*******************************************************************************/
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/* RAID Accelerator Request Message */
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typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
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{
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U16 Reserved0; /* 0x00 */
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U8 ChainOffset; /* 0x02 */
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U8 Function; /* 0x03 */
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U16 Reserved1; /* 0x04 */
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U8 Reserved2; /* 0x06 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
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U8 DmaEngineNumber; /* 0x14 */
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U8 Reserved4; /* 0x15 */
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U16 Reserved5; /* 0x16 */
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U32 Reserved6; /* 0x18 */
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U32 Reserved7; /* 0x1C */
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U32 Reserved8; /* 0x20 */
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} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
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Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
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/* RAID Accelerator Error Reply Message */
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typedef struct _MPI2_RAID_ACCELERATOR_REPLY
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{
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U16 Reserved0; /* 0x00 */
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U8 MsgLength; /* 0x02 */
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U8 Function; /* 0x03 */
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U16 Reserved1; /* 0x04 */
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U8 Reserved2; /* 0x06 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U16 Reserved4; /* 0x0C */
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U16 IOCStatus; /* 0x0E */
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U32 IOCLogInfo; /* 0x10 */
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U32 ProductSpecificData[3]; /* 0x14 */
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} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
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Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
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#endif
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