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52 lines
1.9 KiB
ArmAsm
52 lines
1.9 KiB
ArmAsm
/*-
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* Copyright (c) 2009 Neelkanth Natu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asm.h>
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#include <machine/cpuregs.h>
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.set mips64
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.set noat
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.set noreorder
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#ifdef SMP
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/*
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* This function must be implemented in assembly because it is called early
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* in AP boot without a valid stack.
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*
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* This cpu number is available in bits 25 to 27 of the coprocessor 0 PRID
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* register. This is not documented in the BCM1250 user manual but can be
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* gleaned from the CFE source code - see sb1250_altcpu.S
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*/
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LEAF(platform_processor_id)
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mfc0 v0, MIPS_COP_0_PRID
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srl v0, v0, 25
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jr ra
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and v0, v0, 7
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END(platform_processor_id)
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#endif /* SMP */
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