Andrew Turner 405ada37fb Add support for the uart classes to set their default register shift value. ... This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week		2015-04-11 17:16:23 +00:00
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central
conf	Apply r276208 to non-amd64 NOTES files as well to fix tinderbox builds	2015-03-25 15:51:41 +00:00
ebus
fhc
include	Move the 32-bit compatible procfs types from freebsd32.h to <sys/procfs.h>	2015-04-08 16:30:45 +00:00
isa
pci	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
sbus
sparc64	Fix integer truncation bug in malloc(9)	2015-04-01 12:42:26 +00:00