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634 lines
16 KiB
C
634 lines
16 KiB
C
/*
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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*
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* This device-driver helps the userland controlprogram for a LORAN-C
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* receiver avoid monopolizing the CPU.
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*
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* This is clearly a candidate for the "most weird hardware support in
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* FreeBSD" prize. At this time only two copies of the receiver are
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* known to exist in the entire world.
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*
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* Details can be found at:
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* ftp://ftp.eecis.udel.edu/pub/ntp/loran.tar.Z
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#ifdef _KERNEL
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/uio.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/timetc.h>
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#include <i386/isa/isa_device.h>
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#endif /* _KERNEL */
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typedef TAILQ_HEAD(, datapoint) dphead_t;
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struct datapoint {
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/* Fields used by kernel */
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u_int64_t scheduled;
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u_int code;
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u_int fri;
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u_int agc;
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u_int phase;
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u_int width;
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u_int par;
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u_int isig;
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u_int qsig;
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u_int ssig;
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u_int64_t epoch;
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TAILQ_ENTRY(datapoint) list;
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int vco;
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int bounce;
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pid_t pid;
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struct timespec when;
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int priority;
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dphead_t *home;
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/* Fields used only in userland */
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void (*proc)(struct datapoint *);
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void *ident;
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int index;
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char *name;
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/* Fields used only in userland */
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double ival;
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double qval;
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double sval;
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double mval;
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};
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/*
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* Mode register (PAR) hardware definitions
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*/
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#define INTEG 0x03 /* integrator mask */
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#define INTEG_1000us 0
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#define INTEG_264us 1
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#define INTEG_36us 2
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#define INTEG_SHORT 3
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#define GATE 0x0C /* gate source mask */
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#define GATE_OPEN 0x0
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#define GATE_GRI 0x4
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#define GATE_PCI 0x8
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#define GATE_STB 0xc
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#define MSB 0x10 /* load dac high-order bits */
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#define IEN 0x20 /* enable interrupt bit */
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#define EN5 0x40 /* enable counter 5 bit */
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#define ENG 0x80 /* enable gri bit */
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#define VCO_SHIFT 8 /* bits of fraction on VCO value */
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#define VCO (2048 << VCO_SHIFT) /* initial vco dac (0 V)*/
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#define PGUARD 990 /* program guard time (cycle) (990!) */
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#ifdef _KERNEL
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#define NLORAN 10 /* Allow ten minor devices */
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#define NDUMMY 4 /* How many idlers we want */
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#define PORT 0x0300 /* controller port address */
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#define GRI 800 /* pulse-group gate (cycle) */
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/*
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* Analog/digital converter (ADC) hardware definitions
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*/
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#define ADC PORT+2 /* adc buffer (r)/address (w) */
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#define ADCGO PORT+3 /* adc status (r)/adc start (w) */
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#define ADC_START 0x01 /* converter start bit (w) */
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#define ADC_BUSY 0x01 /* converter busy bit (r) */
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#define ADC_DONE 0x80 /* converter done bit (r) */
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#define ADC_I 0 /* i channel (phase) */
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#define ADC_Q 1 /* q channel (amplitude) */
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#define ADC_S 2 /* s channel (agc) */
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/*
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* Digital/analog converter (DAC) hardware definitions
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* Note: output voltage increases with value programmed; the buffer
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* is loaded in two 8-bit bytes, the lsb 8 bits with the MSB bit off in
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* the PAR register, the msb 4 bits with the MSB on.
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*/
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#define DACA PORT+4 /* vco (dac a) buffer (w) */
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#define DACB PORT+5 /* agc (dac b) buffer (w) */
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#define LOAD_DAC(dac, val) if (0) { } else { \
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par &= ~MSB; outb(PAR, par); outb((dac), (val) & 0xff); \
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par |= MSB; outb(PAR, par); outb((dac), ((val) >> 8) & 0xff); \
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}
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/*
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* Pulse-code generator (CODE) hardware definitions
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* Note: bits are shifted out from the lsb first
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*/
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#define CODE PORT+6 /* pulse-code buffer (w) */
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#define MPCA 0xCA /* LORAN-C master pulse code group a */
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#define MPCB 0x9F /* LORAN-C master pulse code group b */
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#define SPCA 0xF9 /* LORAN-C slave pulse code group a */
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#define SPCB 0xAC /* LORAN-C slave pulse code group b */
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/*
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* Mode register (PAR) hardware definitions
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*/
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#define PAR PORT+7 /* parameter buffer (w) */
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#define TGC PORT+0 /* stc control port (r/w) */
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#define TGD PORT+1 /* stc data port (r/w) */
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/*
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* Timing generator (STC) hardware commands
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*/
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/* argument sssss = counter numbers 5-1 */
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#define TG_LOADDP 0x00 /* load data pointer */
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/* argument ee = element (all groups except ggg = 000 or 111) */
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#define MODEREG 0x00 /* mode register */
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#define LOADREG 0x08 /* load register */
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#define HOLDREG 0x10 /* hold register */
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#define HOLDINC 0x18 /* hold register (hold cycle increm) */
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/* argument ee = element (group ggg = 111) */
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#define ALARM1 0x07 /* alarm register 1 */
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#define ALARM2 0x0F /* alarm register 2 */
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#define MASTER 0x17 /* master mode register */
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#define STATUS 0x1F /* status register */
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#define ARM 0x20 /* arm counters */
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#define LOAD 0x40 /* load counters */
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#define TG_LOADARM 0x60 /* load and arm counters */
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#define DISSAVE 0x80 /* disarm and save counters */
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#define TG_SAVE 0xA0 /* save counters */
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#define DISARM 0xC0 /* disarm counters */
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/* argument nnn = counter number */
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#define SETTOG 0xE8 /* set toggle output HIGH for counter */
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#define CLRTOG 0xE0 /* set toggle output LOW for counter */
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#define STEP 0xF0 /* step counter */
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/* argument eeggg, where ee = element, ggg - counter group */
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/* no arguments */
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#define ENABDPS 0xE0 /* enable data pointer sequencing */
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#define ENABFOUT 0xE6 /* enable fout */
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#define ENAB8 0xE7 /* enable 8-bit data bus */
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#define DSABDPS 0xE8 /* disable data pointer sequencing */
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#define ENAB16 0xEF /* enable 16-bit data bus */
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#define DSABFOUT 0xEE /* disable fout */
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#define ENABPFW 0xF8 /* enable prefetch for write */
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#define DSABPFW 0xF9 /* disable prefetch for write */
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#define TG_RESET 0xFF /* master reset */
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#define LOAD_9513(index, val) if (0) {} else { \
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outb(TGC, TG_LOADDP + (index)); \
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outb(TGD, (val) & 0xff); \
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outb(TGD, ((val) >> 8) & 0xff); \
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}
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#define NENV 40 /* size of envelope filter */
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#define CLOCK 50 /* clock period (clock) */
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#define CYCLE 10 /* carrier period (us) */
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#define PCX (NENV * CLOCK) /* envelope gate (clock) */
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#define STROBE 50 /* strobe gate (clock) */
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/**********************************************************************/
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extern struct cdevsw loran_cdevsw;
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static dphead_t minors[NLORAN + 1], working;
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static struct datapoint dummy[NDUMMY], *first, *second;
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static u_int64_t ticker;
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static u_char par;
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static MALLOC_DEFINE(M_LORAN, "Loran", "Loran datapoints");
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static int loranerror;
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static char lorantext[160];
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static u_int vco_is;
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static u_int vco_should;
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static u_int vco_want;
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static u_int64_t vco_when;
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static int64_t vco_error;
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/**********************************************************************/
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static int loranprobe (struct isa_device *dvp);
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static void init_tgc (void);
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static int loranattach (struct isa_device *isdp);
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static void loranenqueue (struct datapoint *);
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static d_open_t loranopen;
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static d_close_t loranclose;
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static d_read_t loranread;
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static d_write_t loranwrite;
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static ointhand2_t loranintr;
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extern struct timecounter loran_timecounter;
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/**********************************************************************/
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static int
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loranprobe(struct isa_device *dvp)
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{
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dvp->id_iobase = PORT;
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return (8);
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}
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static u_short tg_init[] = { /* stc initialization vector */
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0x0562, 12, 13, /* counter 1 (p0) Mode J */
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0x0262, PGUARD, GRI, /* counter 2 (gri) Mode J */
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0x8562, PCX, 5000 - PCX, /* counter 3 (pcx) */
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0xc562, 0, STROBE, /* counter 4 (stb) Mode L */
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0x052a, 0, 0 /* counter 5 (out) */
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};
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static void
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init_tgc(void)
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{
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int i;
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/* Initialize the 9513A */
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outb(TGC, TG_RESET); outb(TGC, LOAD+0x1f); /* reset STC chip */
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LOAD_9513(MASTER, 0x8af0);
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outb(TGC, TG_LOADDP+1);
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tg_init[4] = 7499 - GRI;
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for (i = 0; i < 5*3; i++) {
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outb(TGD, tg_init[i]);
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outb(TGD, tg_init[i] >> 8);
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}
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outb(TGC, TG_LOADARM+0x1f); /* let the good times roll */
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}
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static int
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loranattach(struct isa_device *isdp)
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{
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int i;
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isdp->id_ointr = loranintr;
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/* We need to be a "fast-intr" */
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/* isdp->id_ri_flags |= RI_FAST; XXX unimplemented - use newbus! */
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printf("loran0: LORAN-C Receiver\n");
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vco_want = vco_should = VCO;
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vco_is = vco_should >> VCO_SHIFT;
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LOAD_DAC(DACA, vco_is);
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init_tgc();
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tc_init(&loran_timecounter);
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TAILQ_INIT(&working);
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for (i = 0; i < NLORAN + 1; i++) {
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TAILQ_INIT(&minors[i]);
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make_dev(&loran_cdevsw, i, UID_ROOT, GID_WHEEL, 0600, "loran%d", i);
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}
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for (i = 0; i < NDUMMY; i++) {
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dummy[i].agc = 4095;
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dummy[i].code = 0xac;
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dummy[i].fri = PGUARD;
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dummy[i].scheduled = PGUARD * 2 * i;
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dummy[i].phase = 50;
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dummy[i].width = 50;
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dummy[i].priority = NLORAN * 256;
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dummy[i].home = &minors[NLORAN];
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if (i == 0)
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first = &dummy[i];
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else if (i == 1)
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second = &dummy[i];
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else
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TAILQ_INSERT_TAIL(&working, &dummy[i], list);
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}
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inb(ADC); /* Flush any old result */
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outb(ADC, ADC_S);
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par = ENG|IEN;
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outb(PAR, par);
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return (1);
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}
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static int
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loranopen (dev_t dev, int flags, int fmt, struct thread *td)
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{
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int idx;
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idx = minor(dev);
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if (idx >= NLORAN)
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return (ENODEV);
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return(0);
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}
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static int
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loranclose(dev_t dev, int flags, int fmt, struct thread *td)
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{
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return(0);
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}
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static int
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loranread(dev_t dev, struct uio * uio, int ioflag)
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{
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u_long ef;
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struct datapoint *this;
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int err, c;
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int idx;
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idx = minor(dev);
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if (loranerror) {
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printf("Loran0: %s", lorantext);
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loranerror = 0;
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return(EIO);
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}
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if (TAILQ_EMPTY(&minors[idx]))
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tsleep (&minors[idx], (PZERO + 8) |PCATCH, "loranrd", hz*2);
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if (TAILQ_EMPTY(&minors[idx]))
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return(0);
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this = TAILQ_FIRST(&minors[idx]);
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ef = read_eflags();
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disable_intr();
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TAILQ_REMOVE(&minors[idx], this, list);
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write_eflags(ef);
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c = imin(uio->uio_resid, (int)sizeof *this);
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err = uiomove((caddr_t)this, c, uio);
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FREE(this, M_LORAN);
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return(err);
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}
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static void
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loranenqueue(struct datapoint *dp)
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{
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struct datapoint *dpp;
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TAILQ_FOREACH(dpp, &working, list) {
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if (dpp->priority <= dp->priority)
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continue;
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TAILQ_INSERT_BEFORE(dpp, dp, list);
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return;
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}
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TAILQ_INSERT_TAIL(&working, dp, list);
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}
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static int
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loranwrite(dev_t dev, struct uio * uio, int ioflag)
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{
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u_long ef;
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int err = 0, c;
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struct datapoint *this;
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int idx;
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u_int64_t dt;
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u_int64_t when;
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idx = minor(dev);
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MALLOC(this, struct datapoint *, sizeof *this, M_LORAN, M_WAITOK);
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c = imin(uio->uio_resid, (int)sizeof *this);
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err = uiomove((caddr_t)this, c, uio);
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if (err) {
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FREE(this, M_LORAN);
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return (err);
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}
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if (this->fri == 0) {
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FREE(this, M_LORAN);
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return (EINVAL);
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}
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this->par &= INTEG|GATE;
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/* XXX more checks needed! */
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this->home = &minors[idx];
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this->priority &= 0xff;
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this->priority += idx * 256;
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this->bounce = 0;
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when = second->scheduled + PGUARD;
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if (when > this->scheduled) {
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dt = when - this->scheduled;
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dt -= dt % this->fri;
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this->scheduled += dt;
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}
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ef = read_eflags();
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disable_intr();
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loranenqueue(this);
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write_eflags(ef);
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if (this->vco >= 0)
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vco_want = this->vco;
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return(err);
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}
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static void
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loranintr(int unit)
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{
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u_long ef;
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int status = 0, i;
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#if 0
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int count = 0;
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#endif
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int delay;
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u_int64_t when;
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struct timespec there, then;
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struct datapoint *dp, *done;
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ef = read_eflags();
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disable_intr();
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/*
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* Pick up the measurement which just completed, and setup
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* the next measurement. We have 1100 microseconds for this
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* of which some eaten by the A/D of the S channel and the
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* interrupt to get us here.
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*/
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done = first;
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nanotime(&there);
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done->ssig = inb(ADC);
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par &= ~(ENG | IEN);
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outb(PAR, par);
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outb(ADC, ADC_I);
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outb(ADCGO, ADC_START);
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/* Interlude: while we wait: setup the next measurement */
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LOAD_DAC(DACB, second->agc);
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outb(CODE, second->code);
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par &= ~(INTEG|GATE);
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par |= second->par;
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par |= ENG | IEN;
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while (!(inb(ADCGO) & ADC_DONE))
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continue;
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done->isig = inb(ADC);
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outb(ADC, ADC_Q);
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outb(ADCGO, ADC_START);
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/* Interlude: while we wait: setup the next measurement */
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/*
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* We need to load this from the opposite register due to some
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* weirdness which you can read about in in the 9513 manual on
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* page 1-26 under "LOAD"
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*/
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LOAD_9513(0x0c, second->phase);
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LOAD_9513(0x14, second->phase);
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outb(TGC, TG_LOADARM + 0x08);
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LOAD_9513(0x14, second->width);
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while (!(inb(ADCGO) & ADC_DONE))
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continue;
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done->qsig = inb(ADC);
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outb(ADC, ADC_S);
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outb(PAR, par);
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/*
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* End of VERY time critical stuff, we have 8 msec to find
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* the next measurement and program the delay.
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*/
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status = inb(TGC);
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nanotime(&then);
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first = second;
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second = 0;
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when = first->scheduled + PGUARD;
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TAILQ_FOREACH(dp, &working, list) {
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while (dp->scheduled < when)
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dp->scheduled += dp->fri;
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if (second && dp->scheduled + PGUARD >= second->scheduled)
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continue;
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second = dp;
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}
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delay = (second->scheduled - first->scheduled) - GRI;
|
|
|
|
LOAD_9513(0x0a, delay);
|
|
|
|
/* Done, the rest is leisure work */
|
|
|
|
vco_error += ((vco_is << VCO_SHIFT) - vco_should) *
|
|
(ticker - vco_when);
|
|
vco_should = vco_want;
|
|
i = vco_should >> VCO_SHIFT;
|
|
if (vco_error < 0)
|
|
i++;
|
|
|
|
if (vco_is != i) {
|
|
LOAD_DAC(DACA, i);
|
|
vco_is = i;
|
|
}
|
|
vco_when = ticker;
|
|
|
|
/* Check if we overran */
|
|
status &= 0x0c;
|
|
#if 0
|
|
|
|
if (status) {
|
|
outb(TGC, TG_SAVE + 2); /* save counter #2 */
|
|
outb(TGC, TG_LOADDP + 0x12); /* hold counter #2 */
|
|
count = inb(TGD);
|
|
count |= inb(TGD) << 8;
|
|
LOAD_9513(0x12, GRI)
|
|
}
|
|
#endif
|
|
|
|
if (status) {
|
|
printf( "Missed: %02x %d first:%p second:%p %.09ld\n",
|
|
status, delay, first, second,
|
|
then.tv_nsec - there.tv_nsec);
|
|
first->bounce++;
|
|
}
|
|
|
|
TAILQ_REMOVE(&working, second, list);
|
|
|
|
if (done->bounce) {
|
|
done->bounce = 0;
|
|
loranenqueue(done);
|
|
} else {
|
|
done->epoch = ticker;
|
|
done->vco = vco_is;
|
|
done->when = there;
|
|
TAILQ_INSERT_TAIL(done->home, done, list);
|
|
wakeup(done->home);
|
|
}
|
|
|
|
ticker = first->scheduled;
|
|
|
|
while ((dp = TAILQ_FIRST(&minors[NLORAN])) != NULL) {
|
|
TAILQ_REMOVE(&minors[NLORAN], dp, list);
|
|
TAILQ_INSERT_TAIL(&working, dp, list);
|
|
}
|
|
|
|
when = second->scheduled + PGUARD;
|
|
|
|
TAILQ_FOREACH(dp, &working, list) {
|
|
while (dp->scheduled < when)
|
|
dp->scheduled += dp->fri;
|
|
}
|
|
write_eflags(ef);
|
|
}
|
|
|
|
/**********************************************************************/
|
|
|
|
static unsigned
|
|
loran_get_timecount(struct timecounter *tc)
|
|
{
|
|
unsigned count;
|
|
u_long ef;
|
|
|
|
ef = read_eflags();
|
|
disable_intr();
|
|
|
|
outb(TGC, TG_SAVE + 0x10); /* save counter #5 */
|
|
outb(TGC, TG_LOADDP +0x15); /* hold counter #5 */
|
|
count = inb(TGD);
|
|
count |= inb(TGD) << 8;
|
|
|
|
write_eflags(ef);
|
|
return (count);
|
|
}
|
|
|
|
static struct timecounter loran_timecounter = {
|
|
loran_get_timecount, /* get_timecount */
|
|
0, /* no pps_poll */
|
|
0xffff, /* counter_mask */
|
|
5000000, /* frequency */
|
|
"loran" /* name */
|
|
};
|
|
|
|
|
|
/**********************************************************************/
|
|
|
|
struct isa_driver lorandriver = {
|
|
INTR_TYPE_TTY | INTR_FAST,
|
|
loranprobe,
|
|
loranattach,
|
|
"loran"
|
|
};
|
|
COMPAT_ISA_DRIVER(loran, lorandriver);
|
|
|
|
static struct cdevsw loran_cdevsw = {
|
|
.d_open = loranopen,
|
|
.d_close = loranclose,
|
|
.d_read = loranread,
|
|
.d_write = loranwrite,
|
|
.d_name = "loran",
|
|
};
|
|
|
|
#endif /* _KERNEL */
|