Jake Burkholder a106c6930a - Change the way the direct mapped region is implemented to be generally ... useful for accessing more than 1 page of contiguous physical memory, and to use 4mb tlb entries instead of 8k. This requires that the system only use the direct mapped addresses when they have the same virtual colour as all other mappings of the same page, instead of being able to choose the colour and cachability of the mapping. - Adapt the physical page copying and zeroing functions to account for not being able to choose the colour or cachability of the direct mapped address. This adds a lot more cases to handle. Basically when a page has a different colour than its direct mapped address we have a choice between bypassing the data cache and using physical addresses directly, which requires a cache flush, or mapping it at the right colour, which requires a tlb flush. For now we choose to map the page and do the tlb flush. This will allows the direct mapped addresses to be used for more things that don't require normal pmap handling, including mapping the vm_page structures, the message buffer, temporary mappings for crash dumps, and will provide greater benefit for implementing uma_small_alloc, due to the much greater tlb coverage.		2002-12-23 23:39:57 +00:00
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compile
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ebus	Add two new workaround for firmware anomalies:	2002-11-07 16:07:46 +00:00
include	- Change the way the direct mapped region is implemented to be generally	2002-12-23 23:39:57 +00:00
isa	Add two new workaround for firmware anomalies:	2002-11-07 16:07:46 +00:00
pci	Exclude yet more interrupt mapping registers from the OBIO INO search,	2002-12-06 13:16:52 +00:00
sbus	Always initialize the UPA target module id in the interrupt mapping	2002-12-01 23:30:26 +00:00
sparc64	- Change the way the direct mapped region is implemented to be generally	2002-12-23 23:39:57 +00:00