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723 lines
19 KiB
C
723 lines
19 KiB
C
/*
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* Product specific probe and attach routines for:
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* 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers
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*
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* Copyright (c) 1995, 1996 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: aic7870.c,v 1.36 1996/05/30 07:20:17 gibbs Exp $
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*/
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#if defined(__FreeBSD__)
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#include <pci.h>
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#endif
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#if NPCI > 0 || defined(__NetBSD__)
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#if defined(__NetBSD__)
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#endif /* defined(__NetBSD__) */
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#if defined(__FreeBSD__)
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <machine/clock.h>
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#include <i386/scsi/aic7xxx.h>
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#include <i386/scsi/93cx6.h>
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#include <dev/aic7xxx/aic7xxx_reg.h>
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#define PCI_BASEADR0 PCI_MAP_REG_START
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#elif defined(__NetBSD__)
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ic/aic7xxxreg.h>
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#include <dev/ic/aic7xxxvar.h>
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#include <dev/ic/smc93cx6var.h>
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#define bootverbose 1
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#define PCI_BASEADR0 PCI_MAPREG_START
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#endif /* defined(__NetBSD__) */
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#define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul
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#define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul
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#define DEVCONFIG 0x40
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#define MPORTMODE 0x00000400ul /* aic7870 only */
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#define RAMPSM 0x00000200ul /* aic7870 only */
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#define VOLSENSE 0x00000100ul
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#define SCBRAMSEL 0x00000080ul
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#define MRDCEN 0x00000040ul
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#define EXTSCBTIME 0x00000020ul /* aic7870 only */
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#define EXTSCBPEN 0x00000010ul /* aic7870 only */
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#define BERREN 0x00000008ul
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#define DACEN 0x00000004ul
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#define STPWLEVEL 0x00000002ul
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#define DIFACTNEGEN 0x00000001ul /* aic7870 only */
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#define CSIZE_LATTIME 0x0c
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#define CACHESIZE 0x0000003ful /* only 5 bits */
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#define LATTIME 0x0000ff00ul
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/*
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* Define the format of the aic78X0 SEEPROM registers (16 bits).
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*
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*/
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struct seeprom_config {
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/*
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* SCSI ID Configuration Flags
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*/
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#define CFXFER 0x0007 /* synchronous transfer rate */
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#define CFSYNCH 0x0008 /* enable synchronous transfer */
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#define CFDISC 0x0010 /* enable disconnection */
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#define CFWIDEB 0x0020 /* wide bus device */
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/* UNUSED 0x00C0 */
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#define CFSTART 0x0100 /* send start unit SCSI command */
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#define CFINCBIOS 0x0200 /* include in BIOS scan */
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#define CFRNFOUND 0x0400 /* report even if not found */
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/* UNUSED 0xf800 */
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u_int16_t device_flags[16]; /* words 0-15 */
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/*
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* BIOS Control Bits
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*/
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#define CFSUPREM 0x0001 /* support all removeable drives */
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#define CFSUPREMB 0x0002 /* support removeable drives for boot only */
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#define CFBIOSEN 0x0004 /* BIOS enabled */
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/* UNUSED 0x0008 */
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#define CFSM2DRV 0x0010 /* support more than two drives */
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/* UNUSED 0x0060 */
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#define CFEXTEND 0x0080 /* extended translation enabled */
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/* UNUSED 0xff00 */
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u_int16_t bios_control; /* word 16 */
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/*
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* Host Adapter Control Bits
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*/
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/* UNUSED 0x0001 */
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#define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */
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#define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */
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#define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */
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#define CFSPARITY 0x0010 /* SCSI parity */
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/* UNUSED 0x0020 */
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#define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */
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/* UNUSED 0xff80 */
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u_int16_t adapter_control; /* word 17 */
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/*
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* Bus Release, Host Adapter ID
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*/
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#define CFSCSIID 0x000f /* host adapter SCSI ID */
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/* UNUSED 0x00f0 */
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#define CFBRTIME 0xff00 /* bus release time */
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u_int16_t brtime_id; /* word 18 */
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/*
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* Maximum targets
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*/
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#define CFMAXTARG 0x00ff /* maximum targets */
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/* UNUSED 0xff00 */
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u_int16_t max_targets; /* word 19 */
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u_int16_t res_1[11]; /* words 20-30 */
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u_int16_t checksum; /* word 31 */
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};
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static void load_seeprom __P((struct ahc_data *ahc));
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static int acquire_seeprom __P((struct seeprom_descriptor *sd));
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static void release_seeprom __P((struct seeprom_descriptor *sd));
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static u_char aic3940_count;
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#if defined(__FreeBSD__)
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static char* aic7870_probe __P((pcici_t tag, pcidi_t type));
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static void aic7870_attach __P((pcici_t config_id, int unit));
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static struct pci_device ahc_pci_driver = {
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"ahc",
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aic7870_probe,
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aic7870_attach,
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&ahc_unit,
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NULL
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};
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DATA_SET (pcidevice_set, ahc_pci_driver);
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static char*
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aic7870_probe (pcici_t tag, pcidi_t type)
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{
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switch(type) {
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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return ("Adaptec 3940 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_3940:
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return ("Adaptec 3940 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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return ("Adaptec 2944 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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return ("Adaptec 2940 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944:
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return ("Adaptec 2944 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940:
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return ("Adaptec 2940 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7880:
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return ("Adaptec aic7880 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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return ("Adaptec aic7870 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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return ("Adaptec aic7860 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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return ("Adaptec aic7855 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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return ("Adaptec aic7850 SCSI host adapter");
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break;
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default:
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break;
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}
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return (0);
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}
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#elif defined(__NetBSD__)
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int ahc_pci_probe __P((struct device *, void *, void *));
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void ahc_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach ahc_pci_ca = {
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sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach
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};
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int
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ahc_pci_probe(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct pci_attach_args *pa = aux;
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switch (pa->pa_id) {
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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case PCI_DEVICE_ID_ADAPTEC_2944:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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case PCI_DEVICE_ID_ADAPTEC_AIC7880:
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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return 1;
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}
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return 0;
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}
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#endif /* defined(__NetBSD__) */
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#if defined(__FreeBSD__)
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static void
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aic7870_attach(config_id, unit)
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pcici_t config_id;
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int unit;
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#elif defined(__NetBSD__)
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void
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ahc_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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#endif
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{
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#if defined(__FreeBSD__)
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u_long io_port;
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#elif defined(__NetBSD__)
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struct pci_attach_args *pa = aux;
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struct ahc_data *ahc = (void *)self;
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int unit = ahc->sc_dev.dv_unit;
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bus_io_addr_t iobase;
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bus_io_size_t iosize;
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bus_io_handle_t ioh;
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pci_intr_handle_t ih;
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const char *intrstr;
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#endif
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u_long id;
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unsigned opri = 0;
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ahc_type ahc_t = AHC_NONE;
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ahc_flag ahc_f = AHC_FNONE;
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#if defined(__FreeBSD__)
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struct ahc_data *ahc;
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#endif
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u_char ultra_enb = 0;
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u_char our_id = 0;
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#if defined(__FreeBSD__)
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if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0)))
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return;
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/*
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* The first bit of PCI_BASEADR0 is always
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* set hence we mask it off.
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*/
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io_port &= 0xfffffffe;
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#elif defined(__NetBSD__)
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if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR0, &iobase, &iosize))
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return;
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if (bus_io_map(pa->pa_bc, iobase, iosize, &ioh))
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return;
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#endif
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#if defined(__FreeBSD__)
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switch ((id = pci_conf_read(config_id, PCI_ID_REG))) {
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#elif defined(__NetBSD__)
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switch (id = pa->pa_id) {
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#endif
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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if (id == PCI_DEVICE_ID_ADAPTEC_3940U)
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ahc_t = AHC_394U;
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else
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ahc_t = AHC_394;
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aic3940_count++;
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if(!(aic3940_count & 0x01))
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/* Even count implies second channel */
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ahc_f |= AHC_CHNLB;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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ahc_t = AHC_294U;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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ahc_t = AHC_294;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7880:
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ahc_t = AHC_AIC7880;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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ahc_t = AHC_AIC7870;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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ahc_t = AHC_AIC7860;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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ahc_t = AHC_AIC7850;
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break;
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default:
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break;
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}
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/* On all PCI adapters, we allow SCB paging */
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ahc_f |= AHC_PAGESCBS;
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/* Remeber how the card was setup in case there is no SEEPROM */
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#if defined(__FreeBSD__)
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our_id = inb(SCSIID + io_port) & OID;
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if(ahc_t & AHC_ULTRA)
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ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN;
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#else
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our_id = bus_io_read_1(pa->pa_bc, ioh, SCSIID) & OID;
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if(ahc_t & AHC_ULTRA)
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ultra_enb = bus_io_read_1(pa->pa_bc, ioh, SXFRCTL0) & ULTRAEN;
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#endif
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#if defined(__FreeBSD__)
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ahc_reset(io_port);
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#elif defined(__NetBSD__)
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printf("\n");
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ahc_reset(ahc->sc_dev.dv_xname, pa->pa_bc, ioh);
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#endif
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if(ahc_t & AHC_AIC7870){
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#if defined(__FreeBSD__)
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u_long devconfig = pci_conf_read(config_id, DEVCONFIG);
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#elif defined(__NetBSD__)
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u_long devconfig =
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pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
|
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#endif
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if(devconfig & (RAMPSM)) {
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/*
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* External SRAM present. Have the probe walk
|
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* the SCBs to see how much SRAM we have and set
|
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* the number of SCBs accordingly. We have to
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* turn off SCBRAMSEL to access the external
|
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* SCB SRAM.
|
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*
|
|
* It seems that early versions of the aic7870
|
|
* didn't use these bits, hence the hack for the
|
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* 3940 above. I would guess that recent 3940s
|
|
* using later aic7870 or aic7880 chips do
|
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* actually set RAMPSM.
|
|
*
|
|
* The documentation isn't clear, but it sounds
|
|
* like the value written to devconfig must not
|
|
* have RAMPSM set. The second sixteen bits of
|
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* the register are R/O anyway, so it shouldn't
|
|
* affect RAMPSM either way.
|
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*/
|
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devconfig &= ~(RAMPSM|SCBRAMSEL);
|
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#if defined(__FreeBSD__)
|
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pci_conf_write(config_id, DEVCONFIG, devconfig);
|
|
#elif defined(__NetBSD__)
|
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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DEVCONFIG, devconfig);
|
|
#endif
|
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}
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}
|
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|
|
#if defined(__FreeBSD__)
|
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if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f)))
|
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return; /* XXX PCI code should take return status */
|
|
|
|
if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) {
|
|
ahc_free(ahc);
|
|
return;
|
|
}
|
|
#elif defined(__NetBSD__)
|
|
ahc_construct(ahc, pa->pa_bc, ioh, ahc_t, ahc_f);
|
|
|
|
if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
|
|
pa->pa_intrline, &ih)) {
|
|
printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname);
|
|
ahc_free(ahc);
|
|
return;
|
|
}
|
|
intrstr = pci_intr_string(pa->pa_pc, ih);
|
|
ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc
|
|
#ifdef __OpenBSD__
|
|
, ahc->sc_dev.dv_xname
|
|
#endif
|
|
);
|
|
if (ahc->sc_ih == NULL) {
|
|
printf("%s: couldn't establish interrupt",
|
|
ahc->sc_dev.dv_xname);
|
|
if (intrstr != NULL)
|
|
printf(" at %s", intrstr);
|
|
printf("\n");
|
|
ahc_free(ahc);
|
|
return;
|
|
}
|
|
if (intrstr != NULL)
|
|
printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname,
|
|
intrstr);
|
|
#endif
|
|
/*
|
|
* Protect ourself from spurrious interrupts during
|
|
* intialization.
|
|
*/
|
|
opri = splbio();
|
|
|
|
/*
|
|
* Do aic7870/aic7880/aic7850 specific initialization
|
|
*/
|
|
{
|
|
u_char sblkctl;
|
|
char *id_string;
|
|
|
|
switch(ahc->type) {
|
|
case AHC_394U:
|
|
case AHC_294U:
|
|
case AHC_AIC7880:
|
|
{
|
|
id_string = "aic7880 ";
|
|
load_seeprom(ahc);
|
|
break;
|
|
}
|
|
case AHC_394:
|
|
case AHC_294:
|
|
case AHC_AIC7870:
|
|
{
|
|
id_string = "aic7870 ";
|
|
load_seeprom(ahc);
|
|
break;
|
|
}
|
|
case AHC_AIC7860:
|
|
{
|
|
id_string = "aic7860 ";
|
|
/*
|
|
* Use defaults, if the chip wasn't initialized by
|
|
* a BIOS.
|
|
*/
|
|
ahc->flags |= AHC_USEDEFAULTS;
|
|
break;
|
|
}
|
|
case AHC_AIC7850:
|
|
{
|
|
id_string = "aic7850 ";
|
|
/*
|
|
* Use defaults, if the chip wasn't initialized by
|
|
* a BIOS.
|
|
*/
|
|
ahc->flags |= AHC_USEDEFAULTS;
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
printf("ahc: Unknown controller type. Ignoring.\n");
|
|
ahc_free(ahc);
|
|
splx(opri);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Take the LED out of diagnostic mode
|
|
*/
|
|
sblkctl = AHC_INB(ahc, SBLKCTL);
|
|
AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
|
|
|
|
/*
|
|
* I don't know where this is set in the SEEPROM or by the
|
|
* BIOS, so we default to 100%.
|
|
*/
|
|
AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100);
|
|
|
|
if(ahc->flags & AHC_USEDEFAULTS) {
|
|
/*
|
|
* PCI Adapter default setup
|
|
* Should only be used if the adapter does not have
|
|
* an SEEPROM.
|
|
*/
|
|
/* See if someone else set us up already */
|
|
u_long i;
|
|
for(i = TARG_SCRATCH; i < 0x60; i++) {
|
|
if(AHC_INB(ahc, i) != 0x00)
|
|
break;
|
|
}
|
|
if(i == TARG_SCRATCH) {
|
|
/*
|
|
* Try looking for all ones. You can get
|
|
* either.
|
|
*/
|
|
for (i = TARG_SCRATCH; i < 0x60; i++) {
|
|
if(AHC_INB(ahc, i) != 0xff)
|
|
break;
|
|
}
|
|
}
|
|
if((i != 0x60) && (our_id != 0)) {
|
|
printf("%s: Using left over BIOS settings\n",
|
|
ahc_name(ahc));
|
|
ahc->flags &= ~AHC_USEDEFAULTS;
|
|
}
|
|
else
|
|
our_id = 0x07;
|
|
AHC_OUTB(ahc, SCSICONF,
|
|
(our_id & 0x07)|ENSPCHK|RESET_SCSI);
|
|
/* In case we are a wide card */
|
|
AHC_OUTB(ahc, SCSICONF + 1, our_id);
|
|
|
|
if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) {
|
|
/*
|
|
* If there wasn't a BIOS or the board
|
|
* wasn't in this mode to begin with,
|
|
* turn off ultra.
|
|
*/
|
|
ahc->type &= ~AHC_ULTRA;
|
|
}
|
|
}
|
|
|
|
printf("%s: %s", ahc_name(ahc), id_string);
|
|
}
|
|
|
|
if(ahc_init(ahc)){
|
|
ahc_free(ahc);
|
|
splx(opri);
|
|
return; /* XXX PCI code should take return status */
|
|
}
|
|
splx(opri);
|
|
|
|
ahc_attach(ahc);
|
|
}
|
|
|
|
/*
|
|
* Read the SEEPROM. Return 0 on failure
|
|
*/
|
|
void
|
|
load_seeprom(ahc)
|
|
struct ahc_data *ahc;
|
|
{
|
|
struct seeprom_descriptor sd;
|
|
struct seeprom_config sc;
|
|
u_short *scarray = (u_short *)≻
|
|
u_short checksum = 0;
|
|
u_char scsi_conf;
|
|
u_char host_id;
|
|
int have_seeprom;
|
|
|
|
#if defined(__FreeBSD__)
|
|
sd.sd_iobase = ahc->baseport + SEECTL;
|
|
#elif defined(__NetBSD__)
|
|
sd.sd_bc = ahc->sc_bc;
|
|
sd.sd_ioh = ahc->sc_ioh;
|
|
sd.sd_offset = SEECTL;
|
|
#endif
|
|
sd.sd_MS = SEEMS;
|
|
sd.sd_RDY = SEERDY;
|
|
sd.sd_CS = SEECS;
|
|
sd.sd_CK = SEECK;
|
|
sd.sd_DO = SEEDO;
|
|
sd.sd_DI = SEEDI;
|
|
|
|
if(bootverbose)
|
|
printf("%s: Reading SEEPROM...", ahc_name(ahc));
|
|
have_seeprom = acquire_seeprom(&sd);
|
|
if (have_seeprom) {
|
|
have_seeprom = read_seeprom(&sd,
|
|
(u_int16_t *)&sc,
|
|
ahc->flags & AHC_CHNLB,
|
|
sizeof(sc)/2);
|
|
release_seeprom(&sd);
|
|
if (have_seeprom) {
|
|
/* Check checksum */
|
|
int i;
|
|
|
|
for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1)
|
|
checksum = checksum + scarray[i];
|
|
if (checksum != sc.checksum) {
|
|
if(bootverbose)
|
|
printf ("checksum error");
|
|
have_seeprom = 0;
|
|
}
|
|
else if(bootverbose)
|
|
printf("done.\n");
|
|
}
|
|
}
|
|
if (!have_seeprom) {
|
|
if(bootverbose)
|
|
printf("\n%s: No SEEPROM availible\n", ahc_name(ahc));
|
|
ahc->flags |= AHC_USEDEFAULTS;
|
|
}
|
|
else {
|
|
/*
|
|
* Put the data we've collected down into SRAM
|
|
* where ahc_init will find it.
|
|
*/
|
|
int i;
|
|
int max_targ = sc.max_targets & CFMAXTARG;
|
|
|
|
for(i = 0; i < max_targ; i++){
|
|
u_char target_settings;
|
|
target_settings = (sc.device_flags[i] & CFXFER) << 4;
|
|
if (sc.device_flags[i] & CFSYNCH)
|
|
target_settings |= SOFS;
|
|
if (sc.device_flags[i] & CFWIDEB)
|
|
target_settings |= WIDEXFER;
|
|
if (sc.device_flags[i] & CFDISC)
|
|
ahc->discenable |= (0x01 << i);
|
|
AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings);
|
|
}
|
|
AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff));
|
|
AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff));
|
|
|
|
host_id = sc.brtime_id & CFSCSIID;
|
|
|
|
scsi_conf = (host_id & 0x7);
|
|
if(sc.adapter_control & CFSPARITY)
|
|
scsi_conf |= ENSPCHK;
|
|
if(sc.adapter_control & CFRESETB)
|
|
scsi_conf |= RESET_SCSI;
|
|
|
|
if(ahc->type & AHC_ULTRA) {
|
|
/* Should we enable Ultra mode? */
|
|
if(!(sc.adapter_control & CFULTRAEN))
|
|
/* Treat us as a non-ultra card */
|
|
ahc->type &= ~AHC_ULTRA;
|
|
}
|
|
/* Set the host ID */
|
|
AHC_OUTB(ahc, SCSICONF, scsi_conf);
|
|
/* In case we are a wide card */
|
|
AHC_OUTB(ahc, SCSICONF + 1, host_id);
|
|
}
|
|
}
|
|
|
|
static int
|
|
acquire_seeprom(sd)
|
|
struct seeprom_descriptor *sd;
|
|
{
|
|
int wait;
|
|
|
|
/*
|
|
* Request access of the memory port. When access is
|
|
* granted, SEERDY will go high. We use a 1 second
|
|
* timeout which should be near 1 second more than
|
|
* is needed. Reason: after the chip reset, there
|
|
* should be no contention.
|
|
*/
|
|
SEEPROM_OUTB(sd, sd->sd_MS);
|
|
wait = 1000; /* 1 second timeout in msec */
|
|
while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) {
|
|
DELAY (1000); /* delay 1 msec */
|
|
}
|
|
if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) {
|
|
SEEPROM_OUTB(sd, 0);
|
|
return (0);
|
|
}
|
|
return(1);
|
|
}
|
|
|
|
static void
|
|
release_seeprom(sd)
|
|
struct seeprom_descriptor *sd;
|
|
{
|
|
/* Release access to the memory port and the serial EEPROM. */
|
|
SEEPROM_OUTB(sd, 0);
|
|
}
|
|
|
|
#endif /* NPCI > 0 */
|