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93 lines
3.1 KiB
C
93 lines
3.1 KiB
C
/* $FreeBSD$ */
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/*
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* Copyright (c) 2000 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#define DWLPX_NONE 0
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#define DWLPX_SG32K 1
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#define DWLPX_SG64K 2
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#define DWLPX_SG128K 3
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/*
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* Each DWLPX supports up to 15 devices, 12 of which are PCI slots.
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*
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* Since the STD I/O modules in slots 12-14 are really a PCI-EISA
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* bridge, we'll punt on those for the moment.
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*/
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#define DWLPX_MAXDEV 12
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/*
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* There are 5 possible slots that can have I/O boards, and for each
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* one there are 4 possible hoses. To cover them all, we'd have to
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* reserve 5 bits of selector out our current 32 bit cookie we use
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* for primary PCI address spaces. It turns out that we *just* have
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* enough bits for this (see drawing in dwlpxreg.h)
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*/
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#define DWLPX_NIONODE 5
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#define DWLPX_NHOSE 4
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/*
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* Interrupt Cookie for DWLPX vectors.
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*
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* Bits 0..3 PCI Slot (0..11)
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* Bits 4..7 I/O Hose (0..3)
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* Bits 8..11 I/O Node (0..4)
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* Bit 15 Constant 1
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*/
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#define DWLPX_VEC_MARK (1<<15)
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#define DWLPX_MVEC(ionode, hose, pcislot) \
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(DWLPX_VEC_MARK | (ionode << 8) | (hose << 4) | (pcislot))
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#define DWLPX_MVEC_IONODE(cookie) \
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((((u_int64_t)(cookie)) >> 8) & 0xf)
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#define DWLPX_MVEC_HOSE(cookie) \
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((((u_int64_t)(cookie)) >> 4) & 0xf)
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#define DWLPX_MVEC_PCISLOT(cookie) \
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(((u_int64_t)(cookie)) & 0xf)
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/*
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* DWLPX Error Interrupt
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*/
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#define DWLPX_VEC_EMARK (1<<14)
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#define DWLPX_ERRVEC(ionode, hose) \
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(DWLPX_VEC_EMARK | (ionode << 8) | (hose << 4))
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/*
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* Default values to put into DWLPX IMASK register(s)
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*/
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#define DWLPX_IMASK_DFLT \
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(1 << 24) | /* IPL 17 for error interrupts */ \
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(1 << 17) | /* IPL 14 for device interrupts */ \
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(1 << 16) /* Enable Error Interrupts */
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#define DWLPX_BASE(node, hose) \
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((((unsigned long)(node - 4)) << 36) | \
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(((unsigned long)(hose)) << 34) | \
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(1LL << 39))
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