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727c18a84f
allow us to add an ACPI attachment for arm64. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7307
107 lines
3.1 KiB
C
107 lines
3.1 KiB
C
/*-
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* Copyright (c) 2011,2016 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Andrew Turner under
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* sponsorship from the FreeBSD Foundation.
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*
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* Developed by Damjan Marion <damjan.marion@gmail.com>
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*
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* Based on OMAP4 GIC code by Ben Gray
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _ARM_GIC_H_
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#define _ARM_GIC_H_
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#define GIC_DEBUG_SPURIOUS
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#define GIC_FIRST_SGI 0 /* Irqs 0-15 are SGIs/IPIs. */
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#define GIC_LAST_SGI 15
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#define GIC_FIRST_PPI 16 /* Irqs 16-31 are private (per */
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#define GIC_LAST_PPI 31 /* core) peripheral interrupts. */
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#define GIC_FIRST_SPI 32 /* Irqs 32+ are shared peripherals. */
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#ifdef INTRNG
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struct arm_gic_range {
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uint64_t bus;
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uint64_t host;
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uint64_t size;
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};
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#endif
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struct arm_gic_softc {
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device_t gic_dev;
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#ifdef INTRNG
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void * gic_intrhand;
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struct gic_irqsrc * gic_irqs;
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#endif
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struct resource * gic_res[3];
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bus_space_tag_t gic_c_bst;
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bus_space_tag_t gic_d_bst;
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bus_space_handle_t gic_c_bsh;
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bus_space_handle_t gic_d_bsh;
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uint8_t ver;
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struct mtx mutex;
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uint32_t nirqs;
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uint32_t typer;
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#ifdef GIC_DEBUG_SPURIOUS
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uint32_t last_irq[MAXCPU];
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#endif
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#ifdef INTRNG
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/* FDT child data */
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pcell_t addr_cells;
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pcell_t size_cells;
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int nranges;
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struct arm_gic_range * ranges;
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#endif
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};
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DECLARE_CLASS(arm_gic_driver);
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#ifdef INTRNG
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struct arm_gicv2m_softc {
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struct resource *sc_mem;
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struct mtx sc_mutex;
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uintptr_t sc_xref;
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u_int sc_spi_start;
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u_int sc_spi_end;
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u_int sc_spi_count;
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};
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DECLARE_CLASS(arm_gicv2m_driver);
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#endif
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int arm_gic_attach(device_t);
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int arm_gic_detach(device_t);
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int arm_gicv2m_attach(device_t);
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int arm_gic_intr(void *);
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#endif /* _ARM_GIC_H_ */
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