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96 lines
4.2 KiB
C
96 lines
4.2 KiB
C
/*-
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* Copyright (c) 2003 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2004 Jason L. Wright (jason@thought.net).
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* from: OpenBSD: fhcreg.h,v 1.3 2004/09/28 16:26:03 jason Exp
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*
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* $FreeBSD$
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*/
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#ifndef _SPARC64_FHC_FHCREG_H_
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#define _SPARC64_FHC_FHCREG_H_
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#define FHC_NREG (6)
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#define FHC_INTERNAL (0)
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#define FHC_IGN (1)
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#define FHC_FANFAIL (2)
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#define FHC_SYSTEM (3)
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#define FHC_UART (4)
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#define FHC_TOD (5)
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#define FHC_IMAP 0x0
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#define FHC_ICLR 0x10
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#define FHC_ID 0x00000000 /* ID */
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#define FHC_RCS 0x00000010 /* reset ctrl/status */
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#define FHC_CTRL 0x00000020 /* control */
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#define FHC_BSR 0x00000030 /* board status */
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#define FHC_ECC 0x00000040 /* ECC control */
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#define FHC_JCTRL 0x000000f0 /* JTAG control */
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#define FHC_CTRL_ICS 0x00100000 /* ignore centerplane sigs */
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#define FHC_CTRL_FRST 0x00080000 /* fatal error reset enable */
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#define FHC_CTRL_LFAT 0x00040000 /* AC/DC local error */
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#define FHC_CTRL_SLINE 0x00010000 /* firmware sync line */
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#define FHC_CTRL_DCD 0x00008000 /* DC/DC converter disable */
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#define FHC_CTRL_POFF 0x00004000 /* AC/DC ctlr PLL disable */
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#define FHC_CTRL_FOFF 0x00002000 /* FHC ctlr PLL disable */
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#define FHC_CTRL_AOFF 0x00001000 /* cpu a sram low pwr mode */
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#define FHC_CTRL_BOFF 0x00000800 /* cpu b sram low pwr mode */
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#define FHC_CTRL_PSOFF 0x00000400 /* disable fhc power supply */
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#define FHC_CTRL_IXIST 0x00000200 /* fhc notifies clock-board */
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#define FHC_CTRL_XMSTR 0x00000100 /* xir master enable */
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#define FHC_CTRL_LLED 0x00000040 /* left led (reversed) */
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#define FHC_CTRL_MLED 0x00000020 /* middle led */
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#define FHC_CTRL_RLED 0x00000010 /* right led */
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#define FHC_CTRL_BPINS 0x00000003 /* spare bidir pins */
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#endif /* !_SPARC64_FHC_FHCREG_H_ */
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