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d4fcf3cba5
and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
420 lines
12 KiB
C
420 lines
12 KiB
C
/* $NetBSD: am79c930.c,v 1.9 2004/01/15 09:33:48 onoe Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Bill Sommerfeld
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Am79c930 chip driver.
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*
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* This is used by the awi driver to use the shared
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* memory attached to the 79c930 to communicate with the firmware running
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* in the 930's on-board 80188 core.
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*
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* The 79c930 can be mapped into just I/O space, or also have a
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* memory mapping; the mapping must be set up by the bus front-end
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* before am79c930_init is called.
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*/
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/*
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* operations:
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*
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* read_8, read_16, read_32, read_64, read_bytes
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* write_8, write_16, write_32, write_64, write_bytes
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* (two versions, depending on whether memory-space or i/o space is in use).
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*
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* interrupt E.C.
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* start isr
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* end isr
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*/
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#include <sys/cdefs.h>
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#ifdef __NetBSD__
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__KERNEL_RCSID(0, "$NetBSD: am79c930.c,v 1.9 2004/01/15 09:33:48 onoe Exp $");
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#endif
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#ifdef __FreeBSD__
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__FBSDID("$FreeBSD$");
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#ifndef __FreeBSD__
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#include <sys/device.h>
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#endif
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#ifdef __NetBSD__
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#include <machine/intr.h>
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#endif
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#ifdef __NetBSD__
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#include <dev/ic/am79c930reg.h>
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#include <dev/ic/am79c930var.h>
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#endif
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#ifdef __FreeBSD__
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#include <dev/awi/am79c930reg.h>
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#include <dev/awi/am79c930var.h>
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#endif
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#define AM930_DELAY(x) /*nothing*/
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void am79c930_regdump(struct am79c930_softc *sc);
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static void io_write_1(struct am79c930_softc *, u_int32_t, u_int8_t);
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static void io_write_2(struct am79c930_softc *, u_int32_t, u_int16_t);
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static void io_write_4(struct am79c930_softc *, u_int32_t, u_int32_t);
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static void io_write_bytes(struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
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static u_int8_t io_read_1(struct am79c930_softc *, u_int32_t);
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static u_int16_t io_read_2(struct am79c930_softc *, u_int32_t);
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static u_int32_t io_read_4(struct am79c930_softc *, u_int32_t);
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static void io_read_bytes(struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
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static void mem_write_1(struct am79c930_softc *, u_int32_t, u_int8_t);
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static void mem_write_2(struct am79c930_softc *, u_int32_t, u_int16_t);
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static void mem_write_4(struct am79c930_softc *, u_int32_t, u_int32_t);
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static void mem_write_bytes(struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
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static u_int8_t mem_read_1(struct am79c930_softc *, u_int32_t);
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static u_int16_t mem_read_2(struct am79c930_softc *, u_int32_t);
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static u_int32_t mem_read_4(struct am79c930_softc *, u_int32_t);
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static void mem_read_bytes(struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
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static struct am79c930_ops iospace_ops = {
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io_write_1,
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io_write_2,
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io_write_4,
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io_write_bytes,
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io_read_1,
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io_read_2,
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io_read_4,
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io_read_bytes
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};
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struct am79c930_ops memspace_ops = {
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mem_write_1,
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mem_write_2,
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mem_write_4,
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mem_write_bytes,
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mem_read_1,
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mem_read_2,
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mem_read_4,
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mem_read_bytes
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};
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static void
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io_write_1( struct am79c930_softc *sc, u_int32_t off, u_int8_t val)
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{
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA, val);
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AM930_DELAY(1);
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}
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static void
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io_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)
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{
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, val & 0xff);
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, (val>>8)&0xff);
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AM930_DELAY(1);
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}
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static void
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io_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)
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{
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,val & 0xff);
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>8)&0xff);
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>16)&0xff);
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>24)&0xff);
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AM930_DELAY(1);
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}
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static void
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io_write_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
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size_t len)
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{
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int i;
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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for (i=0; i<len; i++)
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bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,ptr[i]);
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}
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static u_int8_t
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io_read_1(struct am79c930_softc *sc, u_int32_t off)
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{
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u_int8_t val;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
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AM930_DELAY(1);
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return val;
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}
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static u_int16_t
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io_read_2(struct am79c930_softc *sc, u_int32_t off)
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{
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u_int16_t val;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
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AM930_DELAY(1);
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val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
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AM930_DELAY(1);
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return val;
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}
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static u_int32_t
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io_read_4(struct am79c930_softc *sc, u_int32_t off)
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{
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u_int32_t val;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
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AM930_DELAY(1);
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val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
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AM930_DELAY(1);
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val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 16;
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AM930_DELAY(1);
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val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 24;
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AM930_DELAY(1);
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return val;
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}
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static void
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io_read_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
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size_t len)
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{
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int i;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
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((off>>8)& 0x7f));
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AM930_DELAY(1);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
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AM930_DELAY(1);
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for (i=0; i<len; i++)
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ptr[i] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
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AM79C930_IODPA);
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}
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static void
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mem_write_1(struct am79c930_softc *sc, u_int32_t off, u_int8_t val)
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{
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bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val);
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}
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static
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void mem_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)
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{
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bus_space_tag_t t = sc->sc_memt;
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bus_space_handle_t h = sc->sc_memh;
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/* could be unaligned */
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if ((off & 0x1) == 0)
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bus_space_write_2(t, h, off, htole16(val));
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else {
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bus_space_write_1(t, h, off, val & 0xff);
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bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
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}
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}
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static void
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mem_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)
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{
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bus_space_tag_t t = sc->sc_memt;
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bus_space_handle_t h = sc->sc_memh;
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/* could be unaligned */
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if ((off & 0x3) == 0)
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bus_space_write_4(t, h, off, htole32(val));
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else {
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bus_space_write_1(t, h, off, val & 0xff);
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bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
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bus_space_write_1(t, h, off+2, (val >> 16) & 0xff);
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bus_space_write_1(t, h, off+3, (val >> 24) & 0xff);
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}
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}
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static void
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mem_write_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
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size_t len)
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{
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bus_space_write_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
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}
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static u_int8_t
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mem_read_1(struct am79c930_softc *sc, u_int32_t off)
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{
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return bus_space_read_1(sc->sc_memt, sc->sc_memh, off);
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}
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static u_int16_t
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mem_read_2(struct am79c930_softc *sc, u_int32_t off)
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{
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/* could be unaligned */
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if ((off & 0x1) == 0)
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return le16toh(bus_space_read_2(sc->sc_memt, sc->sc_memh, off));
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else
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return
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bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8);
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}
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static u_int32_t
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mem_read_4(struct am79c930_softc *sc, u_int32_t off)
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{
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/* could be unaligned */
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if ((off & 0x3) == 0)
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return le32toh(bus_space_read_4(sc->sc_memt, sc->sc_memh, off));
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else
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return
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bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+2) <<16) |
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(bus_space_read_1(sc->sc_memt, sc->sc_memh, off+3) <<24);
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}
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static void
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mem_read_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
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size_t len)
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{
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bus_space_read_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
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}
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/*
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* Set bits in GCR.
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*/
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void
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am79c930_gcr_setbits(struct am79c930_softc *sc, u_int8_t bits)
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{
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u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
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gcr |= bits;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
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}
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/*
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* Clear bits in GCR.
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*/
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void
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am79c930_gcr_clearbits(struct am79c930_softc *sc, u_int8_t bits)
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{
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u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
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gcr &= ~bits;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
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}
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u_int8_t
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am79c930_gcr_read(struct am79c930_softc *sc)
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{
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return bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
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}
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#if 0
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void
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am79c930_regdump(struct am79c930_softc *sc)
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{
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u_int8_t buf[8];
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int i;
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AM930_DELAY(5);
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for (i=0; i<8; i++) {
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buf[i] = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, i);
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AM930_DELAY(5);
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}
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printf("am79c930: regdump:");
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for (i=0; i<8; i++) {
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printf(" %02x", buf[i]);
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}
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printf("\n");
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}
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#endif
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void
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am79c930_chip_init(struct am79c930_softc *sc, int how)
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{
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/* zero the bank select register, and leave it that way.. */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_BSS, 0);
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if (how)
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sc->sc_ops = &memspace_ops;
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else
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sc->sc_ops = &iospace_ops;
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}
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