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302 lines
9.9 KiB
C
302 lines
9.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1991 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and William Jolitz of UUNET Technologies Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Derived from hp300 version by Mike Hibler, this version by William
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* Jolitz uses a recursive map [a pde points to the page directory] to
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* map the page tables using the pagetables themselves. This is done to
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* reduce the impact on kernel virtual memory for lots of sparse address
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* space, and to reduce the cost of memory to each process.
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*
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* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
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* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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/*
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* Page-directory and page-table entries follow this format, with a few
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* of the fields not present here and there, depending on a lot of things.
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*/
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/* ---- Intel Nomenclature ---- */
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#define PG_V 0x001 /* P Valid */
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#define PG_RW 0x002 /* R/W Read/Write */
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#define PG_U 0x004 /* U/S User/Supervisor */
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#define PG_NC_PWT 0x008 /* PWT Write through */
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#define PG_NC_PCD 0x010 /* PCD Cache disable */
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#define PG_A 0x020 /* A Accessed */
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#define PG_M 0x040 /* D Dirty */
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#define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */
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#define PG_PTE_PAT 0x080 /* PAT PAT index */
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#define PG_G 0x100 /* G Global */
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#define PG_AVAIL1 0x200 /* / Available for system */
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#define PG_AVAIL2 0x400 /* < programmers use */
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#define PG_AVAIL3 0x800 /* \ */
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#define PG_PDE_PAT 0x1000 /* PAT PAT index */
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#define PG_NX (1ull<<63) /* No-execute */
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/* Our various interpretations of the above */
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#define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
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#define PG_MANAGED PG_AVAIL2
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#define PG_PROMOTED PG_AVAIL3 /* PDE only */
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#define PG_PROT (PG_RW|PG_U) /* all protection bits . */
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#define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
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/* Page level cache control fields used to determine the PAT type */
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#define PG_PDE_CACHE (PG_PDE_PAT | PG_NC_PWT | PG_NC_PCD)
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#define PG_PTE_CACHE (PG_PTE_PAT | PG_NC_PWT | PG_NC_PCD)
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/*
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* Promotion to a 2 or 4MB (PDE) page mapping requires that the corresponding
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* 4KB (PTE) page mappings have identical settings for the following fields:
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*/
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#define PG_PTE_PROMOTE (PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
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PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)
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/*
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* Page Protection Exception bits
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*/
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#define PGEX_P 0x01 /* Protection violation vs. not present */
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#define PGEX_W 0x02 /* during a Write cycle */
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#define PGEX_U 0x04 /* access from User mode (UPL) */
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#define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
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#define PGEX_I 0x10 /* during an instruction fetch */
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/*
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* Pte related macros
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*/
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#define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
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#ifndef NKPDE
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#define NKPDE (KVA_PAGES) /* number of page tables/pde's */
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#endif
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#define PDRSHIFT_PAE 21 /* LOG2(NBPDR) */
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#define PG_FRAME_PAE (0x000ffffffffff000ull)
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#define PG_PS_FRAME_PAE (0x000fffffffe00000ull)
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#define PDRSHIFT_NOPAE 22
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#define PG_FRAME_NOPAE (~PAGE_MASK)
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#define PG_PS_FRAME_NOPAE (0xffc00000)
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/*
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* The *PTDI values control the layout of virtual memory
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*/
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#define KPTDI 0 /* start of kernel virtual pde's */
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/* ptd entry that points to ptd */
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#define PTDPTDI (NPDEPTD - NTRPPTD - NPGPTD)
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#define TRPTDI (NPDEPTD - NTRPPTD) /* u/k trampoline ptd */
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/*
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* XXX doesn't really belong here I guess...
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*/
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#define ISA_HOLE_START 0xa0000
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#define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
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#ifndef LOCORE
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#include <sys/queue.h>
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#include <sys/_cpuset.h>
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#include <sys/_lock.h>
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#include <sys/_mutex.h>
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#include <vm/_vm_radix.h>
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/*
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* Address of current address space page table maps and directories.
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*/
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#ifdef _KERNEL
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/*
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* Translate a virtual address to its physical address.
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*
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* This macro may be used before pmap_bootstrap() is called.
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*/
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#define vtophys(va) pmap_kextract((vm_offset_t)(va))
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#define pte_clear(ptep) pte_store(ptep, 0)
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#define pde_store(pdep, pde) pte_store(pdep, pde)
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#endif /* _KERNEL */
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/*
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* Pmap stuff
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*/
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struct pv_entry;
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struct pv_chunk;
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struct md_page {
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TAILQ_HEAD(,pv_entry) pv_list;
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int pat_mode;
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};
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struct pmap {
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cpuset_t pm_active; /* active on cpus */
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struct mtx pm_mtx;
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struct pmap_statistics pm_stats; /* pmap statistics */
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uint32_t *pm_pdir_nopae; /* KVA of page directory */
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uint64_t *pm_pdir_pae;
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TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
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LIST_ENTRY(pmap) pm_list; /* List of all pmaps */
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uint64_t *pm_pdpt_pae;
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struct vm_radix pm_root; /* spare page table pages */
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vm_page_t pm_ptdpg[4]; /* PAE NPGPTD */
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};
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typedef struct pmap *pmap_t;
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#ifdef _KERNEL
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extern struct pmap kernel_pmap_store;
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#define kernel_pmap (&kernel_pmap_store)
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#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
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#define PMAP_LOCK_ASSERT(pmap, type) \
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mtx_assert(&(pmap)->pm_mtx, (type))
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#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
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#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
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NULL, MTX_DEF | MTX_DUPOK)
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#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
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#define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
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#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
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#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
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#endif
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/*
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* For each vm_page_t, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry_t, the list is pv_list.
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*/
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typedef struct pv_entry {
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vm_offset_t pv_va; /* virtual address for mapping */
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TAILQ_ENTRY(pv_entry) pv_next;
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} *pv_entry_t;
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/*
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* pv_entries are allocated in chunks per-process. This avoids the
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* need to track per-pmap assignments.
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*/
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#define _NPCM 11
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#define _NPCPV 336
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struct pv_chunk {
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pmap_t pc_pmap;
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TAILQ_ENTRY(pv_chunk) pc_list;
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uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */
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TAILQ_ENTRY(pv_chunk) pc_lru;
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struct pv_entry pc_pventry[_NPCPV];
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};
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#ifdef _KERNEL
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extern char *ptvmmap; /* poor name! */
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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#define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode)
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#define pmap_page_is_write_mapped(m) (((m)->a.flags & PGA_WRITEABLE) != 0)
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#define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz))
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static inline int
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pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused)
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{
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return (0);
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}
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struct sf_buf;
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/*
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* Only the following functions or macros may be used before pmap_bootstrap()
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* is called: pmap_kenter(), pmap_kextract(), pmap_kremove(), vtophys(), and
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* vtopte().
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*/
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void pmap_activate_boot(pmap_t pmap);
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void pmap_basemem_setup(u_int basemem);
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void *pmap_bios16_enter(void);
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void pmap_bios16_leave(void *handle);
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void pmap_bootstrap(vm_paddr_t);
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int pmap_cache_bits(pmap_t, int mode, boolean_t is_pde);
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int pmap_change_attr(vm_offset_t, vm_size_t, int);
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caddr_t pmap_cmap3(vm_paddr_t pa, u_int pte_bits);
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void pmap_cp_slow0_map(vm_offset_t kaddr, int plen, vm_page_t *ma);
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void pmap_flush_page(vm_page_t m);
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u_int pmap_get_kcr3(void);
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u_int pmap_get_cr3(pmap_t);
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vm_offset_t pmap_get_map_low(void);
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vm_offset_t pmap_get_vm_maxuser_address(void);
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void pmap_init_pat(void);
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void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
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void *pmap_kenter_temporary(vm_paddr_t pa, int i);
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vm_paddr_t pmap_kextract(vm_offset_t va);
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void pmap_kremove(vm_offset_t);
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void pmap_ksetrw(vm_offset_t va);
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void *pmap_mapbios(vm_paddr_t, vm_size_t);
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void *pmap_mapdev(vm_paddr_t, vm_size_t);
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void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
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boolean_t pmap_page_is_mapped(vm_page_t m);
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void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
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vm_paddr_t pmap_pg_frame(vm_paddr_t pa);
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bool pmap_ps_enabled(pmap_t pmap);
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void pmap_remap_lower(bool);
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void pmap_remap_lowptdi(bool);
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void pmap_set_nx(void);
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void pmap_sf_buf_map(struct sf_buf *sf);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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void pmap_invalidate_page(pmap_t, vm_offset_t);
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void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
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void pmap_invalidate_all(pmap_t);
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void pmap_invalidate_cache(void);
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void pmap_invalidate_cache_pages(vm_page_t *pages, int count);
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void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
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void pmap_force_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
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void *pmap_trm_alloc(size_t size, int flags);
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void pmap_trm_free(void *addr, size_t size);
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void invltlb_glob(void);
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struct thread;
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extern int pae_mode;
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extern int i386_pmap_VM_NFREEORDER;
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extern int i386_pmap_VM_LEVEL_0_ORDER;
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extern int i386_pmap_PDRSHIFT;
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#endif /* _KERNEL */
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#endif /* !LOCORE */
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#endif /* !_MACHINE_PMAP_H_ */
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