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819 lines
19 KiB
C
819 lines
19 KiB
C
/*-
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* Copyright (c) 1995 Matt Thomas (thomas@lkg.dec.com)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_pdq.c,v 1.5 1995/04/05 08:19:23 davidg Exp $
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*
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*/
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/*
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* DEC PDQ FDDI Controller; code for BSD derived operating systems
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*
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* Written by Matt Thomas
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*
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* This driver supports the following FDDI controllers:
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*
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* Device: Config file entry:
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* DEC DEFPA (PCI) device fpa0
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* DEC DEFEA (EISA) device fea0 at isa0 net irq ? vector feaintr
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*
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* Eventually, the following adapters will also be supported:
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*
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* DEC DEFTA (TC) device fta0 at tc? slot * vector ftaintr
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* DEC DEFQA (Q-Bus) device fta0 at uba? csr 0?? vector fqaintr
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* DEC DEFAA (FB+) device faa0 at fbus? slot * vector faaintr
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*/
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#include "fea.h" /* DEFPA EISA FDDI */
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#ifndef __bsdi__
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#include "fpa.h" /* DEFPA PCI FDDI */
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#endif
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#if NFPA > 0 || NFEA > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <net/if.h>
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#include <net/if_types.h>
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#include <net/if_dl.h>
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#include <net/route.h>
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#include "bpfilter.h"
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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#include <netinet/if_ether.h>
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#endif
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#include <netinet/if_fddi.h>
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_param.h>
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#if NFPA > 0
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#include <pci/pcivar.h>
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#include <i386/isa/icu.h>
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#endif
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#if NFEA > 0
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#include <i386/isa/isa.h>
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#include <i386/isa/icu.h>
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#ifdef __FreeBSD__
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#include <sys/devconf.h>
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#include <i386/isa/isa_device.h>
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#endif
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#ifdef __bsdi__
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#include <sys/device.h>
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#include <i386/isa/isavar.h>
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#include <i386/eisa/eisa.h>
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#endif
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#endif
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#include "pdqreg.h"
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#include "pdq_os.h"
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typedef struct {
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#ifdef __bsdi__
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struct device sc_dev; /* base device */
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struct isadev sc_id; /* ISA device */
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struct intrhand sc_ih; /* intrrupt vectoring */
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struct atshutdown sc_ats; /* shutdown routine */
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#endif
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struct arpcom sc_ac;
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pdq_t *sc_pdq;
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#if NBPFILTER > 0 && !defined(__FreeBSD__) && !defined(__bsdi__)
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caddr_t sc_bpf;
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#endif
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#if NFEA > 0
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unsigned sc_iobase;
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#endif
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} pdq_softc_t;
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#define sc_if sc_ac.ac_if
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#if defined(__FreeBSD__)
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#define sc_bpf sc_if.if_bpf
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typedef void ifnet_ret_t;
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#elif defined(__bsdi__)
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#define sc_bpf sc_if.if_bpf
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typedef int ifnet_ret_t;
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#endif
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static void
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pdq_ifreset(
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pdq_softc_t *sc)
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{
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pdq_stop(sc->sc_pdq);
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}
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static void
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pdq_ifinit(
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pdq_softc_t *sc)
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{
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if (sc->sc_if.if_flags & IFF_UP) {
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sc->sc_if.if_flags |= IFF_RUNNING;
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if (sc->sc_if.if_flags & IFF_PROMISC) {
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sc->sc_pdq->pdq_flags |= PDQ_PROMISC;
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} else {
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sc->sc_pdq->pdq_flags &= ~PDQ_PROMISC;
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}
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if (sc->sc_if.if_flags & IFF_ALLMULTI) {
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sc->sc_pdq->pdq_flags |= PDQ_ALLMULTI;
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} else {
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sc->sc_pdq->pdq_flags &= ~PDQ_ALLMULTI;
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}
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if (sc->sc_if.if_flags & IFF_LINK1) {
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sc->sc_pdq->pdq_flags |= PDQ_PASS_SMT;
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} else {
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sc->sc_pdq->pdq_flags &= ~PDQ_PASS_SMT;
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}
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sc->sc_pdq->pdq_flags |= PDQ_RUNNING;
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pdq_run(sc->sc_pdq);
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} else {
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sc->sc_if.if_flags &= ~IFF_RUNNING;
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sc->sc_pdq->pdq_flags &= ~PDQ_RUNNING;
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pdq_stop(sc->sc_pdq);
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}
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}
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static void
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pdq_ifwatchdog(
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pdq_softc_t *sc)
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{
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struct mbuf *m;
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/*
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* No progress was made on the transmit queue for PDQ_OS_TX_TRANSMIT
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* seconds. Remove all queued packets.
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*/
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sc->sc_if.if_flags &= ~IFF_OACTIVE;
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sc->sc_if.if_timer = 0;
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for (;;) {
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IF_DEQUEUE(&sc->sc_if.if_snd, m);
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if (m == NULL)
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return;
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m_freem(m);
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}
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}
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static ifnet_ret_t
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pdq_ifstart(
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struct ifnet *ifp)
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{
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pdq_softc_t *sc = (pdq_softc_t *) ((caddr_t) ifp - offsetof(pdq_softc_t, sc_ac.ac_if));
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struct ifqueue *ifq = &ifp->if_snd;
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struct mbuf *m;
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int tx = 0;
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if ((ifp->if_flags & IFF_RUNNING) == 0)
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return;
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if (sc->sc_if.if_timer == 0)
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sc->sc_if.if_timer = PDQ_OS_TX_TIMEOUT;
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if ((sc->sc_pdq->pdq_flags & PDQ_TXOK) == 0) {
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sc->sc_if.if_flags |= IFF_OACTIVE;
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return;
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}
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for (;; tx = 1) {
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IF_DEQUEUE(ifq, m);
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if (m == NULL)
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break;
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if (pdq_queue_transmit_data(sc->sc_pdq, m) == PDQ_FALSE) {
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ifp->if_flags |= IFF_OACTIVE;
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IF_PREPEND(ifq, m);
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break;
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}
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}
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if (tx)
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PDQ_DO_TYPE2_PRODUCER(sc->sc_pdq);
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}
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void
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pdq_os_receive_pdu(
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pdq_t *pdq,
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struct mbuf *m,
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size_t pktlen)
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{
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pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
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struct fddi_header *fh = mtod(m, struct fddi_header *);
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sc->sc_if.if_ipackets++;
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#if NBPFILTER > 0
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if (sc->sc_bpf != NULL)
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bpf_mtap(sc->sc_bpf, m);
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if ((fh->fddi_fc & (FDDIFC_L|FDDIFC_F)) != FDDIFC_LLC_ASYNC) {
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m_freem(m);
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return;
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}
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#endif
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m->m_data += sizeof(struct fddi_header);
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m->m_len -= sizeof(struct fddi_header);
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m->m_pkthdr.len = pktlen - sizeof(struct fddi_header);
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m->m_pkthdr.rcvif = &sc->sc_if;
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fddi_input(&sc->sc_if, fh, m);
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}
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void
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pdq_os_restart_transmitter(
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pdq_t *pdq)
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{
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pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
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sc->sc_if.if_flags &= ~IFF_OACTIVE;
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if (sc->sc_if.if_snd.ifq_head != NULL) {
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sc->sc_if.if_timer = PDQ_OS_TX_TIMEOUT;
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pdq_ifstart(&sc->sc_if);
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} else {
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sc->sc_if.if_timer = 0;
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}
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}
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void
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pdq_os_transmit_done(
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pdq_t *pdq,
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struct mbuf *m)
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{
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pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
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#if NBPFILTER > 0
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if (sc->sc_bpf != NULL)
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bpf_mtap(sc->sc_bpf, m);
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#endif
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m_freem(m);
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sc->sc_if.if_opackets++;
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}
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void
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pdq_os_addr_fill(
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pdq_t *pdq,
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pdq_lanaddr_t *addr,
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size_t num_addrs)
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{
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pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
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struct ether_multistep step;
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struct ether_multi *enm;
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ETHER_FIRST_MULTI(step, &sc->sc_ac, enm);
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while (enm != NULL && num_addrs > 0) {
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((u_short *) addr->lanaddr_bytes)[0] = ((u_short *) enm->enm_addrlo)[0];
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((u_short *) addr->lanaddr_bytes)[1] = ((u_short *) enm->enm_addrlo)[1];
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((u_short *) addr->lanaddr_bytes)[2] = ((u_short *) enm->enm_addrlo)[2];
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ETHER_NEXT_MULTI(step, enm);
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addr++;
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num_addrs--;
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}
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}
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static int
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pdq_ifioctl(
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struct ifnet *ifp,
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int cmd,
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caddr_t data)
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{
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pdq_softc_t *sc = (pdq_softc_t *) ((caddr_t) ifp - offsetof(pdq_softc_t, sc_ac.ac_if));
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int s, error = 0;
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s = splimp();
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switch (cmd) {
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case SIOCSIFADDR: {
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struct ifaddr *ifa = (struct ifaddr *)data;
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ifp->if_flags |= IFF_UP;
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switch(ifa->ifa_addr->sa_family) {
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#ifdef INET
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case AF_INET: {
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((struct arpcom *)ifp)->ac_ipaddr = IA_SIN(ifa)->sin_addr;
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(*ifp->if_init)(ifp->if_unit);
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#ifdef __FreeBSD__
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arp_ifinit((struct arpcom *)ifp, ifa);
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#else
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arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr);
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#endif
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break;
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}
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#endif /* INET */
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#ifdef NS
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/* This magic copied from if_is.c; I don't use XNS,
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* so I have no way of telling if this actually
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* works or not.
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*/
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case AF_NS: {
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struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
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if (ns_nullhost(*ina)) {
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ina->x_host = *(union ns_host *)(sc->sc_ac.ac_enaddr);
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} else {
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ifp->if_flags &= ~IFF_RUNNING;
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bcopy((caddr_t)ina->x_host.c_host,
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(caddr_t)sc->sc_ac.ac_enaddr,
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sizeof sc->sc_ac.ac_enaddr);
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}
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||
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(*ifp->if_init)(ifp->if_unit);
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break;
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}
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#endif /* NS */
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default: {
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(*ifp->if_init)(ifp->if_unit);
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break;
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}
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}
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break;
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}
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case SIOCSIFFLAGS: {
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(*ifp->if_init)(ifp->if_unit);
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break;
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}
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case SIOCADDMULTI:
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case SIOCDELMULTI: {
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/*
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* Update multicast listeners
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*/
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if (cmd == SIOCADDMULTI)
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error = ether_addmulti((struct ifreq *)data, &sc->sc_ac);
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else
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error = ether_delmulti((struct ifreq *)data, &sc->sc_ac);
|
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|
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if (error == ENETRESET) {
|
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if (sc->sc_if.if_flags & IFF_RUNNING)
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pdq_run(sc->sc_pdq);
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error = 0;
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}
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break;
|
||
}
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||
|
||
default: {
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||
error = EINVAL;
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||
break;
|
||
}
|
||
}
|
||
|
||
splx(s);
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||
return error;
|
||
}
|
||
|
||
static void
|
||
pdq_ifattach(
|
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pdq_softc_t *sc,
|
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ifnet_ret_t (*ifinit)(int unit),
|
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ifnet_ret_t (*ifreset)(int unit),
|
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ifnet_ret_t (*ifwatchdog)(int unit))
|
||
{
|
||
struct ifnet *ifp = &sc->sc_if;
|
||
|
||
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_NOTRAILERS|IFF_MULTICAST;
|
||
|
||
ifp->if_init = ifinit;
|
||
#ifndef __bsdi__
|
||
ifp->if_reset = ifreset;
|
||
#endif
|
||
ifp->if_watchdog = ifwatchdog;
|
||
|
||
ifp->if_ioctl = pdq_ifioctl;
|
||
ifp->if_output = fddi_output;
|
||
ifp->if_start = pdq_ifstart;
|
||
|
||
if_attach(ifp);
|
||
fddi_ifattach(ifp);
|
||
#if NBPFILTER > 0
|
||
bpfattach(&sc->sc_bpf, ifp, DLT_FDDI, sizeof(struct fddi_header));
|
||
#endif
|
||
|
||
}
|
||
|
||
#if NFPA > 0
|
||
/*
|
||
* This is the PCI configuration support. Since the PDQ is available
|
||
* on both EISA and PCI boards, one must be careful in how defines the
|
||
* PDQ in the config file.
|
||
*/
|
||
static char *pdq_pci_probe (pcici_t config_id, pcidi_t device_id);
|
||
static void pdq_pci_attach(pcici_t config_id, int unit);
|
||
static u_long pdq_pci_count;
|
||
|
||
struct pci_device fpadevice = {
|
||
"fpa",
|
||
pdq_pci_probe,
|
||
pdq_pci_attach,
|
||
&pdq_pci_count,
|
||
NULL
|
||
};
|
||
|
||
#if defined(__FreeBSD__)
|
||
static pdq_softc_t *pdqs_pci[NFPA];
|
||
#define PDQ_PCI_UNIT_TO_SOFTC(unit) (pdqs_pci[unit])
|
||
|
||
#ifdef DATA_SET
|
||
DATA_SET (pcidevice_set, fpadevice);
|
||
#endif
|
||
#endif
|
||
|
||
#define PCI_CBMA 0x10 /* Configuration Base Memory Address */
|
||
|
||
static ifnet_ret_t
|
||
pdq_pci_ifreset(
|
||
int unit)
|
||
{
|
||
pdq_ifreset(PDQ_PCI_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
static ifnet_ret_t
|
||
pdq_pci_ifinit(
|
||
int unit)
|
||
{
|
||
pdq_ifinit(PDQ_PCI_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
static ifnet_ret_t
|
||
pdq_pci_ifwatchdog(
|
||
int unit)
|
||
{
|
||
pdq_ifwatchdog(PDQ_PCI_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
static int
|
||
pdq_pci_ifintr(
|
||
pdq_softc_t *sc)
|
||
{
|
||
return pdq_interrupt(sc->sc_pdq);
|
||
}
|
||
|
||
static char *
|
||
pdq_pci_probe(
|
||
pcici_t config_id,
|
||
pcidi_t device_id)
|
||
{
|
||
if (device_id == 0x000f1011ul)
|
||
return "Digital DEFPA PCI FDDI Controller";
|
||
return NULL;
|
||
}
|
||
|
||
static void
|
||
pdq_pci_attach(
|
||
pcici_t config_id,
|
||
int unit)
|
||
{
|
||
pdq_softc_t *sc;
|
||
vm_offset_t va_csrs, pa_csrs;
|
||
|
||
if (unit > NFPA) {
|
||
printf("fpa%d: not configured; kernel is built for only %d device%s.\n",
|
||
unit, NFPA, NFPA == 1 ? "" : "s");
|
||
return;
|
||
}
|
||
|
||
sc = (pdq_softc_t *) malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
|
||
if (sc == NULL)
|
||
return;
|
||
|
||
bzero(sc, sizeof(pdq_softc_t)); /* Zero out the softc*/
|
||
if (!pci_map_mem(config_id, PCI_CBMA, &va_csrs, &pa_csrs)) {
|
||
free((void *) sc, M_DEVBUF);
|
||
return;
|
||
}
|
||
|
||
sc->sc_if.if_name = "fpa";
|
||
sc->sc_if.if_unit = unit;
|
||
sc->sc_pdq = pdq_initialize((void *) va_csrs, "fpa", unit,
|
||
(void *) sc, PDQ_DEFPA);
|
||
if (sc->sc_pdq == NULL) {
|
||
free((void *) sc, M_DEVBUF);
|
||
return;
|
||
}
|
||
bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
|
||
pdqs_pci[unit] = sc;
|
||
pdq_ifattach(sc, pdq_pci_ifinit, pdq_pci_ifreset, pdq_pci_ifwatchdog);
|
||
pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask);
|
||
}
|
||
#endif /* NFPA > 0 */
|
||
|
||
#if NFEA > 0
|
||
/*
|
||
*
|
||
*/
|
||
static const int pdq_eisa_irqs[4] = { IRQ9, IRQ10, IRQ11, IRQ15 };
|
||
|
||
#ifdef __FreeBSD__
|
||
static pdq_softc_t *pdqs_eisa[NFEA];
|
||
#define PDQ_EISA_UNIT_TO_SOFTC(unit) (pdqs_eisa[unit])
|
||
#endif
|
||
#ifdef __bsdi__
|
||
extern struct cfdriver feacd;
|
||
#define PDQ_EISA_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)feacd.cd_devs[unit])
|
||
#endif
|
||
|
||
static ifnet_ret_t
|
||
pdq_eisa_ifreset(
|
||
int unit)
|
||
{
|
||
pdq_ifreset(PDQ_EISA_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
static ifnet_ret_t
|
||
pdq_eisa_ifinit(
|
||
int unit)
|
||
{
|
||
pdq_ifinit(PDQ_EISA_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
static ifnet_ret_t
|
||
pdq_eisa_ifwatchdog(
|
||
int unit)
|
||
{
|
||
pdq_ifwatchdog(PDQ_EISA_UNIT_TO_SOFTC(unit));
|
||
}
|
||
|
||
int
|
||
feaintr(
|
||
int unit)
|
||
{
|
||
pdq_interrupt(PDQ_EISA_UNIT_TO_SOFTC(unit)->sc_pdq);
|
||
return unit;
|
||
}
|
||
|
||
void
|
||
pdq_eisa_subprobe(
|
||
pdq_uint32_t iobase,
|
||
pdq_uint32_t *maddr,
|
||
pdq_uint32_t *msize,
|
||
pdq_uint32_t *irq)
|
||
{
|
||
if (irq != NULL)
|
||
*irq = pdq_eisa_irqs[PDQ_OS_IORD_8(iobase + PDQ_EISA_IO_CONFIG_STAT_0) & 3];
|
||
*maddr = (PDQ_OS_IORD_8(iobase + PDQ_EISA_MEM_ADD_CMP_0) << 16)
|
||
| (PDQ_OS_IORD_8(iobase + PDQ_EISA_MEM_ADD_CMP_1) << 8);
|
||
*msize = (PDQ_OS_IORD_8(iobase + PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8;
|
||
}
|
||
|
||
void
|
||
pdq_eisa_devinit(
|
||
pdq_softc_t *sc)
|
||
{
|
||
pdq_uint8_t data;
|
||
|
||
/*
|
||
* Do the standard initialization for the DEFEA registers.
|
||
*/
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_FUNCTION_CTRL, 0x23);
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_IO_CMP_1_1, (sc->sc_iobase >> 8) & 0x0F);
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_IO_CMP_1_0, (sc->sc_iobase >> 8) & 0x0F);
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_SLOT_CTRL, 0x01);
|
||
data = PDQ_OS_IORD_8(sc->sc_iobase + PDQ_EISA_BURST_HOLDOFF);
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_BURST_HOLDOFF, data | 1);
|
||
data = PDQ_OS_IORD_8(sc->sc_iobase + PDQ_EISA_IO_CONFIG_STAT_0);
|
||
PDQ_OS_IOWR_8(sc->sc_iobase + PDQ_EISA_IO_CONFIG_STAT_0, data | 8);
|
||
}
|
||
|
||
#ifdef __FreeBSD__
|
||
static struct kern_devconf kdc_fea[NFEA] = { {
|
||
0, 0, 0, /* filled in by dev_attach */
|
||
"fea", 0, { MDDT_ISA, 0, "net" },
|
||
isa_generic_externalize, 0, 0, ISA_EXTERNALLEN,
|
||
&kdc_isa0, /* parent */
|
||
0, /* parentdata */
|
||
DC_BUSY, /* host adapters are always ``in use'' */
|
||
"DEC DEFEA EISA FDDI Controller"
|
||
} };
|
||
|
||
static inline void
|
||
pdq_eisa_registerdev(
|
||
struct isa_device *id)
|
||
{
|
||
if (id->id_unit)
|
||
kdc_fea[id->id_unit] = kdc_fea[0];
|
||
kdc_fea[id->id_unit].kdc_unit = id->id_unit;
|
||
kdc_fea[id->id_unit].kdc_parentdata = id;
|
||
dev_attach(&kdc_fea[id->id_unit]);
|
||
}
|
||
|
||
static int pdq_eisa_slots = ~1;
|
||
|
||
static int
|
||
pdq_eisa_probe(
|
||
struct isa_device *id)
|
||
{
|
||
pdq_softc_t *sc;
|
||
int slot;
|
||
pdq_uint32_t data, irq, maddr, msize;
|
||
|
||
slot = 0x1000 * (ffs(pdq_eisa_slots) - 1);
|
||
for (; slot <= 0xF000; slot++) {
|
||
pdq_eisa_slots &= ~(1 << (slot >> 12));
|
||
data = PDQ_OS_IORD_32(slot + PDQ_EISA_SLOT_ID);
|
||
if ((data & 0xFFFFFF) != 0x30A310)
|
||
continue;
|
||
id->id_iobase = slot;
|
||
pdq_eisa_subprobe(slot, &maddr, &msize, &irq);
|
||
if (id->id_irq != 0 && irq != id->id_irq) {
|
||
printf("fea%d: error: desired IRQ of %d does not match device's actual IRQ (%d),\n",
|
||
id->id_unit,
|
||
ffs(id->id_irq) - 1, ffs(irq) - 1);
|
||
return 0;
|
||
}
|
||
id->id_irq = irq;
|
||
if (maddr == 0) {
|
||
printf("fea%d: error: memory not enabled! ECU reconfiguration required\n",
|
||
id->id_unit);
|
||
return 0;
|
||
}
|
||
id->id_maddr = (caddr_t) pmap_mapdev(maddr, msize);
|
||
if (id->id_maddr == NULL)
|
||
return 0;
|
||
id->id_msize = msize;
|
||
if (PDQ_EISA_UNIT_TO_SOFTC(id->id_unit) == NULL) {
|
||
sc = (pdq_softc_t *) malloc(sizeof(pdq_softc_t), M_DEVBUF, M_WAITOK);
|
||
if (sc == NULL)
|
||
return 0;
|
||
PDQ_EISA_UNIT_TO_SOFTC(id->id_unit) = sc;
|
||
}
|
||
return 0x1000;
|
||
}
|
||
return 0;
|
||
}
|
||
|
||
static int
|
||
pdq_eisa_attach(
|
||
struct isa_device *id)
|
||
{
|
||
pdq_softc_t *sc = PDQ_EISA_UNIT_TO_SOFTC(id->id_unit);
|
||
|
||
bzero(sc, sizeof(pdq_softc_t)); /* Zero out the softc*/
|
||
|
||
sc->sc_if.if_name = "fea";
|
||
sc->sc_if.if_unit = id->id_unit;
|
||
sc->sc_iobase = id->id_iobase;
|
||
|
||
pdq_eisa_devinit(sc);
|
||
sc->sc_pdq = pdq_initialize((void *) id->id_maddr, "fea", sc->sc_if.if_unit,
|
||
(void *) sc, PDQ_DEFEA);
|
||
if (sc->sc_pdq == NULL) {
|
||
printf("fea%d: initialization failed\n", sc->sc_if.if_unit);
|
||
return 0;
|
||
}
|
||
|
||
bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
|
||
pdq_ifattach(sc, pdq_eisa_ifinit, pdq_eisa_ifreset, pdq_eisa_ifwatchdog);
|
||
pdq_eisa_registerdev(id);
|
||
return 1;
|
||
}
|
||
|
||
/*
|
||
*
|
||
*/
|
||
struct isa_driver feadriver = {
|
||
pdq_eisa_probe,
|
||
pdq_eisa_attach,
|
||
"fea"
|
||
};
|
||
#endif /* __FreeBSD__ */
|
||
|
||
#ifdef __bsdi__
|
||
int
|
||
pdq_eisa_probe(
|
||
struct device *parent,
|
||
struct cfdata *cf,
|
||
void *aux)
|
||
{
|
||
struct isa_attach_args *ia = (struct isa_attach_args *) aux;
|
||
int slot;
|
||
pdq_uint32_t irq, maddr, msize;
|
||
|
||
if (isa_bustype != BUS_EISA)
|
||
return (0);
|
||
|
||
if ((slot = eisa_match(cf, ia)) == 0)
|
||
return (0);
|
||
ia->ia_iobase = slot << 12;
|
||
ia->ia_iosize = EISA_NPORT;
|
||
eisa_slotalloc(slot);
|
||
|
||
pdq_eisa_subprobe(ia->ia_iobase, &maddr, &msize, &irq);
|
||
if (ia->ia_irq != IRQUNK && irq != ia->ia_irq) {
|
||
printf("fea%d: error: desired IRQ of %d does not match device's actual IRQ (%d),\n",
|
||
cf->cf_unit,
|
||
ffs(ia->ia_irq) - 1, ffs(irq) - 1);
|
||
return 0;
|
||
}
|
||
if (ia->ia_irq == IRQUNK) {
|
||
if ((irq = isa_irqalloc(irq)) == 0)
|
||
return 0;
|
||
ia->ia_irq = irq;
|
||
}
|
||
if (maddr == 0) {
|
||
printf("fea%d: error: memory not enabled! ECU reconfiguration required\n",
|
||
cf->cf_unit);
|
||
return 0;
|
||
}
|
||
|
||
/* EISA bus masters don't use host DMA channels */
|
||
ia->ia_drq = 0; /* XXX should be DRQUNK or DRQBUSMASTER? */
|
||
|
||
#if 0
|
||
ia->ia_maddr = maddr;
|
||
ia->ia_msize = msize;
|
||
#else
|
||
ia->ia_maddr = 0;
|
||
ia->ia_msize = 0;
|
||
#endif
|
||
return 1;
|
||
}
|
||
|
||
void
|
||
pdq_eisa_attach(
|
||
struct device *parent,
|
||
struct device *self,
|
||
void *aux)
|
||
{
|
||
pdq_softc_t *sc = (pdq_softc_t *) self;
|
||
register struct isa_attach_args *ia = (struct isa_attach_args *) aux;
|
||
register struct ifnet *ifp = &sc->sc_if;
|
||
int i;
|
||
|
||
sc->sc_if.if_unit = sc->sc_dev.dv_unit;
|
||
sc->sc_if.if_name = "fea";
|
||
sc->sc_if.if_flags = 0;
|
||
|
||
sc->sc_iobase = ia->ia_iobase;
|
||
|
||
sc->sc_pdq = pdq_initialize((void *) ISA_HOLE_VADDR(ia->ia_maddr), "fea",
|
||
sc->sc_if.if_unit, (void *) sc, PDQ_DEFEA);
|
||
if (sc->sc_pdq == NULL) {
|
||
printf("fea%d: initialization failed\n", sc->sc_if.if_unit);
|
||
return;
|
||
}
|
||
|
||
bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
|
||
|
||
pdq_ifattach(sc, pdq_eisa_ifinit, pdq_eisa_ifreset, pdq_eisa_ifwatchdog);
|
||
|
||
isa_establish(&sc->sc_id, &sc->sc_dev);
|
||
|
||
sc->sc_ih.ih_fun = feaintr;
|
||
sc->sc_ih.ih_arg = (void *)sc;
|
||
intr_establish(ia->ia_irq, &sc->sc_ih, DV_NET);
|
||
|
||
sc->sc_ats.func = (void (*)(void *)) pdq_stop;
|
||
sc->sc_ats.arg = (void *) sc->sc_pdq;
|
||
atshutdown(&sc->sc_ats, ATSH_ADD);
|
||
}
|
||
|
||
static char *pdq_eisa_ids[] = {
|
||
"DEC3001", /* 0x0130A310 */
|
||
"DEC3002", /* 0x0230A310 */
|
||
"DEC3003", /* 0x0330A310 */
|
||
"DEC3004", /* 0x0430A310 */
|
||
};
|
||
|
||
struct cfdriver feacd = {
|
||
0, "fea", pdq_eisa_probe, pdq_eisa_attach, DV_IFNET, sizeof(pdq_softc_t),
|
||
pdq_eisa_ids
|
||
};
|
||
#endif /* __bsdi__ */
|
||
#endif /* NFEA > 0 */
|
||
#endif /* NFPA > 0 || NFEA > 0 */
|