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897cd717a5
work in progress and has never booted a real machine. Initial development and testing was done using SimOS (see http://simos.stanford.edu for details). On the SimOS simulator, this port successfully reaches single-user mode and has been tested with loads as high as one copy of /bin/ls :-). Obtained from: partly from NetBSD/alpha
77 lines
2.9 KiB
C
77 lines
2.9 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*/
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#ifndef _MACHINE_CHIPSET_H_
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#define _MACHINE_CHIPSET_H_
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typedef u_int8_t alpha_chipset_inb_t(u_int32_t port);
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typedef u_int16_t alpha_chipset_inw_t(u_int32_t port);
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typedef u_int32_t alpha_chipset_inl_t(u_int32_t port);
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typedef void alpha_chipset_outb_t(u_int32_t port, u_int8_t data);
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typedef void alpha_chipset_outw_t(u_int32_t port, u_int16_t data);
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typedef void alpha_chipset_outl_t(u_int32_t port, u_int32_t data);
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typedef int alpha_chipset_maxdevs_t(u_int bus);
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typedef u_int8_t alpha_chipset_cfgreadb_t(u_int, u_int, u_int, u_int);
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typedef u_int16_t alpha_chipset_cfgreadw_t(u_int, u_int, u_int, u_int);
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typedef u_int32_t alpha_chipset_cfgreadl_t(u_int, u_int, u_int, u_int);
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typedef void alpha_chipset_cfgwriteb_t(u_int, u_int, u_int, u_int,
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u_int8_t);
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typedef void alpha_chipset_cfgwritew_t(u_int, u_int, u_int, u_int,
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u_int16_t);
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typedef void alpha_chipset_cfgwritel_t(u_int, u_int, u_int, u_int,
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u_int32_t);
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typedef struct alpha_chipset {
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/*
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* I/O port access
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*/
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alpha_chipset_inb_t* inb;
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alpha_chipset_inw_t* inw;
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alpha_chipset_inl_t* inl;
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alpha_chipset_outb_t* outb;
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alpha_chipset_outw_t* outw;
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alpha_chipset_outl_t* outl;
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/*
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* PCI configuration access
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*/
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alpha_chipset_maxdevs_t* maxdevs;
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alpha_chipset_cfgreadb_t* cfgreadb;
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alpha_chipset_cfgreadw_t* cfgreadw;
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alpha_chipset_cfgreadl_t* cfgreadl;
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alpha_chipset_cfgwriteb_t* cfgwriteb;
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alpha_chipset_cfgwritew_t* cfgwritew;
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alpha_chipset_cfgwritel_t* cfgwritel;
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} alpha_chipset_t;
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extern alpha_chipset_t chipset;
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#endif /* !_MACHINE_CHIPSET_H_ */
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