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mirror of https://git.FreeBSD.org/src.git synced 2024-12-19 10:53:58 +00:00
freebsd/sys/mips
Adrian Chadd 85b543e06d Populate hw.model with the CPU model information.
Now you see something like:

# sysctl hw.model
hw.model: Atheros AR9330 rev 1

Tested:

* Carambola 2, AR9331 SoC
2015-07-14 05:14:10 +00:00
..
adm5120 Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00
alchemy
atheros Populate hw.model with the CPU model information. 2015-07-14 05:14:10 +00:00
beri Provide the number of interrupt resources added to the list 2015-05-15 13:55:18 +00:00
cavium Huge cleanup of random(4) code. 2015-06-30 17:00:45 +00:00
conf o Add a description for virtio block device implemented 2015-07-03 14:46:57 +00:00
gxemul
idt
include Add the atomic_thread_fence() family of functions with intent to 2015-07-08 18:12:24 +00:00
malta
mips The kernel sends signals to the processes via ABI specific sv_sendsig method. 2015-05-24 17:56:02 +00:00
nlm CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten 2015-05-22 17:05:21 +00:00
rmi CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten 2015-05-22 17:05:21 +00:00
rt305x Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00
sentry5
sibyte