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e0f66ef861
and increase flexibility to allow various different approaches to be tried in the future. - Split struct ithd up into two pieces. struct intr_event holds the list of interrupt handlers associated with interrupt sources. struct intr_thread contains the data relative to an interrupt thread. Currently we still provide a 1:1 relationship of events to threads with the exception that events only have an associated thread if there is at least one threaded interrupt handler attached to the event. This means that on x86 we no longer have 4 bazillion interrupt threads with no handlers. It also means that interrupt events with only INTR_FAST handlers no longer have an associated thread either. - Renamed struct intrhand to struct intr_handler to follow the struct intr_foo naming convention. This did require renaming the powerpc MD struct intr_handler to struct ppc_intr_handler. - INTR_FAST no longer implies INTR_EXCL on all architectures except for powerpc. This means that multiple INTR_FAST handlers can attach to the same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach to the same interrupt. Sharing INTR_FAST handlers may not always be desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun either. Drivers can always still use INTR_EXCL to ask for an interrupt exclusively. The way this sharing works is that when an interrupt comes in, all the INTR_FAST handlers are executed first, and if any threaded handlers exist, the interrupt thread is scheduled afterwards. This type of layout also makes it possible to investigate using interrupt filters ala OS X where the filter determines whether or not its companion threaded handler should run. - Aside from the INTR_FAST changes above, the impact on MD interrupt code is mostly just 's/ithread/intr_event/'. - A new MI ddb command 'show intrs' walks the list of interrupt events dumping their state. It also has a '/v' verbose switch which dumps info about all of the handlers attached to each event. - We currently don't destroy an interrupt thread when the last threaded handler is removed because it would suck for things like ppbus(8)'s braindead behavior. The code is present, though, it is just under #if 0 for now. - Move the code to actually execute the threaded handlers for an interrrupt event into a separate function so that ithread_loop() becomes more readable. Previously this code was all in the middle of ithread_loop() and indented halfway across the screen. - Made struct intr_thread private to kern_intr.c and replaced td_ithd with a thread private flag TDP_ITHREAD. - In statclock, check curthread against idlethread directly rather than curthread's proc against idlethread's proc. (Not really related to intr changes) Tested on: alpha, amd64, i386, sparc64 Tested on: arm, ia64 (older version of patch by cognet and marcel)
419 lines
9.5 KiB
C
419 lines
9.5 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <sys/interrupt.h>
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#include <isa/isareg.h>
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#include <isa/isavar.h>
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#include <isa/isa_common.h>
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#include <alpha/isa/isavar.h>
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#include <machine/intr.h>
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#include <machine/intrcnt.h>
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#include <machine/resource.h>
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#include <machine/cpuconf.h>
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static struct rman isa_irq_rman;
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static struct rman isa_drq_rman;
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static void
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isa_intr_enable(int irq)
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{
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if (irq < 8)
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outb(IO_ICU1+1, inb(IO_ICU1+1) & ~(1 << irq));
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else
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outb(IO_ICU2+1, inb(IO_ICU2+1) & ~(1 << (irq - 8)));
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}
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static void
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isa_intr_disable(int irq)
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{
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if (irq < 8)
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outb(IO_ICU1+1, inb(IO_ICU1+1) | (1 << irq));
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else
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outb(IO_ICU2+1, inb(IO_ICU2+1) | (1 << (irq - 8)));
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}
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intrmask_t
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isa_irq_pending(void)
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{
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u_char irr1;
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u_char irr2;
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irr1 = inb(IO_ICU1);
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irr2 = inb(IO_ICU2);
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return ((irr2 << 8) | irr1);
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}
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intrmask_t
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isa_irq_mask(void)
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{
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u_char irr1;
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u_char irr2;
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irr1 = inb(IO_ICU1+1);
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irr2 = inb(IO_ICU2+1);
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return ((irr2 << 8) | irr1);
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}
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void
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isa_init(device_t dev)
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{
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isa_init_intr();
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}
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void
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isa_init_intr(void)
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{
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static int initted = 0;
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if (initted) return;
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initted = 1;
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isa_irq_rman.rm_start = 0;
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isa_irq_rman.rm_end = 15;
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isa_irq_rman.rm_type = RMAN_ARRAY;
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isa_irq_rman.rm_descr = "ISA Interrupt request lines";
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if (rman_init(&isa_irq_rman)
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|| rman_manage_region(&isa_irq_rman, 0, 1)
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|| rman_manage_region(&isa_irq_rman, 3, 15))
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panic("isa_probe isa_irq_rman");
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isa_drq_rman.rm_start = 0;
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isa_drq_rman.rm_end = 7;
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isa_drq_rman.rm_type = RMAN_ARRAY;
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isa_drq_rman.rm_descr = "ISA DMA request lines";
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if (rman_init(&isa_drq_rman)
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|| rman_manage_region(&isa_drq_rman, 0, 7))
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panic("isa_probe isa_drq_rman");
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/* mask all isa interrupts */
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outb(IO_ICU1+1, 0xff);
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outb(IO_ICU2+1, 0xff);
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/* make sure chaining irq is enabled */
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isa_intr_enable(2);
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}
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struct resource *
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isa_alloc_intr(device_t bus, device_t child, int irq)
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{
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return rman_reserve_resource(&isa_irq_rman, irq, irq, 1,
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0, child);
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}
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struct resource *
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isa_alloc_intrs(device_t bus, device_t child, u_long start, u_long end)
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{
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return rman_reserve_resource(&isa_irq_rman, start, end,
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end - start + 1, 0, child);
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}
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int
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isa_release_intr(device_t bus, device_t child, struct resource *r)
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{
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return rman_release_resource(r);
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}
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/*
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* This implementation simply passes the request up to the parent
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* bus, which in our case is the pci chipset device, substituting any
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* configured values if the caller defaulted. We can get away with
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* this because there is no special mapping for ISA resources on this
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* platform. When porting this code to another architecture, it may be
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* necessary to interpose a mapping layer here.
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*
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* We manage our own interrupt resources since ISA interrupts go through
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* the ISA PIC, not the PCI interrupt controller.
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*/
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struct resource *
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isa_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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/*
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* Consider adding a resource definition.
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*/
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int passthrough = (device_get_parent(child) != bus);
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int isdefault = (start == 0UL && end == ~0UL);
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struct isa_device* idev = DEVTOISA(child);
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struct resource_list *rl = &idev->id_resources;
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struct resource_list_entry *rle;
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struct resource *res;
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if (!passthrough && !isdefault) {
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rle = resource_list_find(rl, type, *rid);
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if (!rle) {
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if (*rid < 0)
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return 0;
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switch (type) {
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case SYS_RES_IRQ:
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if (*rid >= ISA_NIRQ)
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return 0;
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break;
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case SYS_RES_DRQ:
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if (*rid >= ISA_NDRQ)
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return 0;
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break;
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case SYS_RES_MEMORY:
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if (*rid >= ISA_NMEM)
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return 0;
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break;
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case SYS_RES_IOPORT:
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if (*rid >= ISA_NPORT)
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return 0;
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break;
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default:
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return 0;
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}
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resource_list_add(rl, type, *rid, start, end, count);
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}
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}
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if (type != SYS_RES_IRQ && type != SYS_RES_DRQ)
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return resource_list_alloc(rl, bus, child, type, rid,
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start, end, count, flags);
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if (!passthrough) {
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rl = device_get_ivars(child);
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rle = resource_list_find(rl, type, *rid);
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if (!rle)
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return 0;
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if (rle->res)
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panic("isa_alloc_resource: resource entry is busy");
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if (isdefault) {
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start = end = rle->start;
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count = 1;
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}
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}
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if (type == SYS_RES_IRQ)
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res = rman_reserve_resource(&isa_irq_rman, start, start, 1,
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0, child);
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else
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res = rman_reserve_resource(&isa_drq_rman, start, start, 1,
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0, child);
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if (res && !passthrough) {
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rle = resource_list_find(rl, type, *rid);
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rle->start = rman_get_start(res);
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rle->end = rman_get_end(res);
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rle->count = 1;
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rle->res = res;
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}
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return res;
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}
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int
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isa_release_resource(device_t bus, device_t child, int type, int rid,
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struct resource *res)
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{
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int passthrough = (device_get_parent(child) != bus);
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struct isa_device* idev = DEVTOISA(child);
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struct resource_list *rl = &idev->id_resources;
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struct resource_list_entry *rle;
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int error;
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if (type != SYS_RES_IRQ)
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return resource_list_release(rl, bus, child, type, rid, res);
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error = rman_release_resource(res);
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if (!passthrough && !error) {
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rle = resource_list_find(rl, SYS_RES_IRQ, rid);
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if (rle)
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rle->res = NULL;
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else
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error = ENOENT;
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}
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return error;
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}
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struct isa_intr {
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void *ih;
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driver_intr_t *intr;
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void *arg;
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int irq;
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};
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/*
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* Wrap ISA interrupt routines so that we can feed non-specific
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* EOI to the PICs.
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*/
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static void
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isa_handle_fast_intr(void *arg)
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{
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struct isa_intr *ii = arg;
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int irq = ii->irq;
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ii->intr(ii->arg);
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mtx_lock_spin(&icu_lock);
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if (irq > 7)
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outb(IO_ICU2, 0x20 | (irq & 7));
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outb(IO_ICU1, 0x20 | (irq > 7 ? 2 : irq));
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mtx_unlock_spin(&icu_lock);
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}
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static void
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isa_handle_intr(void *arg)
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{
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struct isa_intr *ii = arg;
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ii->intr(ii->arg);
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}
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/*
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* Send a non-specific EIO early, then disable the source
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*/
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static void
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isa_disable_intr(uintptr_t vector)
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{
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int irq;
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irq = (vector - 0x800) >> 4;
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mtx_lock_spin(&icu_lock);
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if (irq > 7)
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outb(IO_ICU2, 0x20 | (irq & 7));
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outb(IO_ICU1, 0x20 | (irq > 7 ? 2 : irq));
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isa_intr_disable(irq);
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mtx_unlock_spin(&icu_lock);
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}
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static void
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isa_enable_intr(uintptr_t vector)
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{
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int irq;
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irq = (vector - 0x800) >> 4;
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mtx_lock_spin(&icu_lock);
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isa_intr_enable(irq);
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mtx_unlock_spin(&icu_lock);
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}
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int
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isa_setup_intr(device_t dev, device_t child,
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struct resource *irq, int flags,
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driver_intr_t *intr, void *arg, void **cookiep)
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{
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struct isa_intr *ii;
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int error;
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if (platform.isa_setup_intr)
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return platform.isa_setup_intr(dev, child, irq, flags,
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intr, arg, cookiep);
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if (irq == NULL)
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return ENODEV;
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error = rman_activate_resource(irq);
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if (error)
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return error;
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ii = malloc(sizeof(struct isa_intr), M_DEVBUF, M_NOWAIT);
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if (!ii)
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return ENOMEM;
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ii->intr = intr;
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ii->arg = arg;
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ii->irq = rman_get_start(irq);
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error = alpha_setup_intr(
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device_get_nameunit(child ? child : dev),
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0x800 + (ii->irq << 4),
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((flags & INTR_FAST) ? isa_handle_fast_intr :
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isa_handle_intr), ii, flags, &ii->ih,
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&intrcnt[INTRCNT_ISA_IRQ + ii->irq],
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isa_disable_intr, isa_enable_intr);
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if (error) {
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free(ii, M_DEVBUF);
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return error;
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}
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mtx_lock_spin(&icu_lock);
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isa_intr_enable(ii->irq);
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mtx_unlock_spin(&icu_lock);
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*cookiep = ii;
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if (child)
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device_printf(child, "interrupting at ISA irq %d\n",
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(int)ii->irq);
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return 0;
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}
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int
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isa_teardown_intr(device_t dev, device_t child,
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struct resource *irq, void *cookie)
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{
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struct isa_intr *ii = cookie;
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struct intr_handler *ih, *handler = (struct intr_handler *)ii->ih;
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struct intr_event *ie = handler->ih_event;
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int num_handlers = 0;
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mtx_lock(&ie->ie_lock);
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TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next)
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num_handlers++;
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mtx_unlock(&ie->ie_lock);
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/*
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* Only disable the interrupt in hardware if there are no
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* other handlers sharing it.
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*/
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if (num_handlers == 1) {
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mtx_lock_spin(&icu_lock);
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isa_intr_disable(ii->irq);
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mtx_unlock_spin(&icu_lock);
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if (platform.isa_teardown_intr) {
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platform.isa_teardown_intr(dev, child, irq, cookie);
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return 0;
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}
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}
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alpha_teardown_intr(ii->ih);
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return 0;
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}
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