Adrian Chadd 6632cb429f Disable setting the MII port speed. ... This seems to break at least my test board here (AR71xx + AR8316 switch PHY). Since I do have a whole sleuth of "normal" PHY boards (with an AR71xx on a normal PHY port), I'll do some further testing with those to determine whether this is a general issue, or whether it's limited to the behaviour of the "fake" dedicated PHY port mode on these atheros switches.		2012-05-04 02:26:15 +00:00
..
apb.c	Move PMC hook invocation to cpu_intr. The idea is the same as with ast()	2012-03-22 17:47:52 +00:00
apbvar.h
ar71xx_bus_space_reversed.c
ar71xx_bus_space_reversed.h
ar71xx_chip.c	Fix a totally bone-headed, last minute bounds check snafu that somehow	2012-05-03 05:52:39 +00:00
ar71xx_chip.h	MII related infrastructure changes.	2012-05-02 01:21:57 +00:00
ar71xx_cpudef.h	Further ar71xx MII support improvements.	2012-05-02 04:51:43 +00:00
ar71xx_ehci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_fixup.c	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar71xx_fixup.h	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar71xx_gpio.c	Allow for a default GPIO pin "high", which is required for some boards	2012-04-20 22:44:00 +00:00
ar71xx_gpiovar.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar71xx_machdep.c	Remove platform APIs which are not used by any code and which had only stub	2012-03-12 07:34:15 +00:00
ar71xx_ohci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_pci_bus_space.c
ar71xx_pci_bus_space.h
ar71xx_pci.c	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar71xx_setup.c	Remove duplicate header includes	2011-06-26 10:07:48 +00:00
ar71xx_setup.h	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
ar71xx_spi.c
ar71xx_wdog.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
ar71xxreg.h	Add a missing newline.	2012-05-02 06:17:16 +00:00
ar91xx_chip.c	Further ar71xx MII support improvements.	2012-05-02 04:51:43 +00:00
ar91xx_chip.h	Add initial Atheros AR91XX support.	2010-08-19 11:40:10 +00:00
ar91xxreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar724x_chip.c	Further ar71xx MII support improvements.	2012-05-02 04:51:43 +00:00
ar724x_chip.h	Add some initial AR724X chipset support.	2010-08-19 11:53:55 +00:00
ar724x_pci.c	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar724xreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
files.ar71xx	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
if_arge.c	Disable setting the MII port speed.	2012-05-04 02:26:15 +00:00
if_argevar.h	Implement PLL configuration override support, similar to what openwrt	2012-05-02 07:43:11 +00:00
pcf2123_rtc.c
pcf2123reg.h
std.ar71xx	Assume a big-endian default on MIPS and drop the "eb" suffix from MACHINE_ARCH.	2012-03-29 02:54:35 +00:00
uart_bus_ar71xx.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
uart_cpu_ar71xx.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00