Jung-uk Kim 3453537fa5 Use atomic load & store for TSC frequency. It may be overkill for amd64 but ... safer for i386 because it can be easily over 4 GHz now. More worse, it can be easily changed by user with 'machdep.tsc_freq' tunable (directly) or cpufreq(4) (indirectly). Note it is intentionally not used in performance critical paths to avoid performance regression (but we should, in theory). Alternatively, we may add "virtual TSC" with lower frequency if maximum frequency overflows 32 bits (and ignore possible incoherency as we do now).		2011-04-07 23:28:28 +00:00
..
ccbque.h
elink.c
elink.h
npx.c	In fpudna()/npxdna(), mark FPU context initialized and optionally	2010-12-12 16:16:39 +00:00
pmtimer.c
prof_machdep.c	Use atomic load & store for TSC frequency. It may be overkill for amd64 but	2011-04-07 23:28:28 +00:00
spic.c
spicreg.h