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4ad6106939
* Support for sam9 "EMAC" controller. * Support for rmii interface to phy. at91.c & at91sam9.c: * Eliminate separate at91sam9.c file. * Add new devices to at91sam9_devs table. at91_machdep.c & at at91sam9_machdep.c: * Automatic chip type determination. * Remove compile time chip dependencies. * Eliminate separate at91sam9_machdep.c file. at91_pmc.c: * Corrected support for all of the sam926? and sam9g20 chips. * Remove compile time chip dependencies. My apologies to Greg for taking so long to take care of it.
412 lines
9.3 KiB
C
412 lines
9.3 KiB
C
/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <arm/at91/at91reg.h>
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#include <arm/at91/at91_pioreg.h>
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#include <arm/at91/at91_piovar.h>
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struct at91_pio_softc
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{
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device_t dev; /* Myself */
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void *intrhand; /* Interrupt handle */
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struct resource *irq_res; /* IRQ resource */
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struct resource *mem_res; /* Memory resource */
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struct mtx sc_mtx; /* basically a perimeter lock */
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struct cdev *cdev;
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int flags;
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#define OPENED 1
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};
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static inline uint32_t
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RD4(struct at91_pio_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->mem_res, off));
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}
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static inline void
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WR4(struct at91_pio_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->mem_res, off, val);
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}
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#define AT91_PIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
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#define AT91_PIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
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#define AT91_PIO_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
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"pio", MTX_SPIN)
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#define AT91_PIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
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#define AT91_PIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
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#define AT91_PIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
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#define CDEV2SOFTC(dev) ((dev)->si_drv1)
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static devclass_t at91_pio_devclass;
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/* bus entry points */
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static int at91_pio_probe(device_t dev);
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static int at91_pio_attach(device_t dev);
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static int at91_pio_detach(device_t dev);
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static int at91_pio_intr(void *);
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/* helper routines */
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static int at91_pio_activate(device_t dev);
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static void at91_pio_deactivate(device_t dev);
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/* cdev routines */
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static d_open_t at91_pio_open;
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static d_close_t at91_pio_close;
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static d_ioctl_t at91_pio_ioctl;
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static struct cdevsw at91_pio_cdevsw =
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{
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.d_version = D_VERSION,
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.d_open = at91_pio_open,
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.d_close = at91_pio_close,
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.d_ioctl = at91_pio_ioctl
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};
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static int
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at91_pio_probe(device_t dev)
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{
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const char *name;
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switch (device_get_unit(dev)) {
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case 0:
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name = "PIOA";
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break;
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case 1:
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name = "PIOB";
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break;
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case 2:
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name = "PIOC";
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break;
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case 3:
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name = "PIOD";
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break;
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default:
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name = "PIO";
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break;
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}
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device_set_desc(dev, name);
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return (0);
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}
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static int
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at91_pio_attach(device_t dev)
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{
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struct at91_pio_softc *sc = device_get_softc(dev);
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int err;
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sc->dev = dev;
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err = at91_pio_activate(dev);
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if (err)
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goto out;
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device_printf(dev, "ABSR: %#x OSR: %#x PSR:%#x ODSR: %#x\n",
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RD4(sc, PIO_ABSR), RD4(sc, PIO_OSR), RD4(sc, PIO_PSR),
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RD4(sc, PIO_ODSR));
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AT91_PIO_LOCK_INIT(sc);
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/*
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* Activate the interrupt, but disable all interrupts in the hardware
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*/
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WR4(sc, PIO_IDR, 0xffffffff);
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err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
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at91_pio_intr, NULL, sc, &sc->intrhand);
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if (err) {
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AT91_PIO_LOCK_DESTROY(sc);
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goto out;
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}
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sc->cdev = make_dev(&at91_pio_cdevsw, device_get_unit(dev), UID_ROOT,
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GID_WHEEL, 0600, "pio%d", device_get_unit(dev));
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if (sc->cdev == NULL) {
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err = ENOMEM;
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goto out;
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}
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sc->cdev->si_drv1 = sc;
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out:;
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if (err)
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at91_pio_deactivate(dev);
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return (err);
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}
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static int
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at91_pio_detach(device_t dev)
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{
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return (EBUSY); /* XXX */
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}
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static int
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at91_pio_activate(device_t dev)
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{
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struct at91_pio_softc *sc;
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int rid;
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sc = device_get_softc(dev);
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL)
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goto errout;
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (sc->irq_res == NULL)
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goto errout;
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return (0);
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errout:
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at91_pio_deactivate(dev);
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return (ENOMEM);
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}
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static void
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at91_pio_deactivate(device_t dev)
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{
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struct at91_pio_softc *sc;
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sc = device_get_softc(dev);
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if (sc->intrhand)
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bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
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sc->intrhand = 0;
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bus_generic_detach(sc->dev);
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if (sc->mem_res)
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bus_release_resource(dev, SYS_RES_IOPORT,
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rman_get_rid(sc->mem_res), sc->mem_res);
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sc->mem_res = 0;
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if (sc->irq_res)
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(sc->irq_res), sc->irq_res);
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sc->irq_res = 0;
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return;
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}
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static int
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at91_pio_intr(void *xsc)
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{
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struct at91_pio_softc *sc = xsc;
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#if 0
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uint32_t status;
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/* Reading the status also clears the interrupt */
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status = RD4(sc, PIO_SR);
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if (status == 0)
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return;
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AT91_PIO_LOCK(sc);
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AT91_PIO_UNLOCK(sc);
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#endif
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wakeup(sc);
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return (FILTER_HANDLED);
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}
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static int
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at91_pio_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct at91_pio_softc *sc;
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sc = CDEV2SOFTC(dev);
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AT91_PIO_LOCK(sc);
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if (!(sc->flags & OPENED)) {
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sc->flags |= OPENED;
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#if 0
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// Enable interrupts
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#endif
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}
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AT91_PIO_UNLOCK(sc);
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return (0);
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}
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static int
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at91_pio_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
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{
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struct at91_pio_softc *sc;
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sc = CDEV2SOFTC(dev);
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AT91_PIO_LOCK(sc);
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sc->flags &= ~OPENED;
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#if 0
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// Disable interrupts
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#endif
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AT91_PIO_UNLOCK(sc);
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return (0);
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}
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static int
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at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td)
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{
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return (ENXIO);
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}
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/*
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* The following functions are called early in the boot process, so
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* don't use bus_space, as that isn't yet available when we need to use
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* them.
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*/
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void
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at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_ASR / 4] = periph_a_mask;
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PIO[PIO_PDR / 4] = periph_a_mask;
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if (use_pullup)
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PIO[PIO_PUER / 4] = periph_a_mask;
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else
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PIO[PIO_PUDR / 4] = periph_a_mask;
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}
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void
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at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_BSR / 4] = periph_b_mask;
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PIO[PIO_PDR / 4] = periph_b_mask;
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if (use_pullup)
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PIO[PIO_PUER / 4] = periph_b_mask;
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else
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PIO[PIO_PUDR / 4] = periph_b_mask;
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}
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void
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at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_PER / 4] = gpio_mask;
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}
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void
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at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_ODR / 4] = input_enable_mask;
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}
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void
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at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask, int use_pullup)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_OER / 4] = output_enable_mask;
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if (use_pullup)
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PIO[PIO_PUER / 4] = output_enable_mask;
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else
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PIO[PIO_PUDR / 4] = output_enable_mask;
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}
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void
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at91_pio_gpio_set(uint32_t pio, uint32_t data_mask)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_SODR / 4] = data_mask;
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}
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void
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at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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PIO[PIO_CODR / 4] = data_mask;
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}
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uint8_t
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at91_pio_gpio_get(uint32_t pio, uint32_t data_mask)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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data_mask &= PIO[PIO_PDSR / 4];
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return (data_mask ? 1 : 0);
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}
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void
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at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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if (use_deglitch)
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PIO[PIO_IFER / 4] = data_mask;
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else
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PIO[PIO_IFDR / 4] = data_mask;
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return;
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}
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void
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at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
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int enable_interrupt)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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if (enable_interrupt)
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PIO[PIO_IER / 4] = data_mask;
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else
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PIO[PIO_IDR / 4] = data_mask;
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return;
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}
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uint32_t
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at91_pio_gpio_clear_interrupt(uint32_t pio)
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{
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uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
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/* reading this register will clear the interrupts */
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return (PIO[PIO_ISR / 4]);
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}
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static device_method_t at91_pio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, at91_pio_probe),
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DEVMETHOD(device_attach, at91_pio_attach),
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DEVMETHOD(device_detach, at91_pio_detach),
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{ 0, 0 }
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};
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static driver_t at91_pio_driver = {
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"at91_pio",
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at91_pio_methods,
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sizeof(struct at91_pio_softc),
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};
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DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, 0, 0);
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