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1f4b0b5767
- Fixed bogus CIS tuple dumping (Network node ID, IRQ modes and etc.) - Include telling drivers ethernet address if Network node ID tuple is available. This is usefull for some bogus ehter cards which can't get correct ethernet address from CIS tupple. Obtained from: PAO3
279 lines
10 KiB
C
279 lines
10 KiB
C
/*
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* PCMCIA card structures and defines.
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* These defines relate to the user level
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* structures and card information, not
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* driver/process communication.
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*-------------------------------------------------------------------------
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*
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* Copyright (c) 1995 Andrew McRae. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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/*
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* Card Information Structure tuples definitions
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* The structure of a tuple is basically:
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*
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* Tuple_code
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* Tuple_data_length
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* Tuple_data ...
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*
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* Tuples are contiguous in attribute memory, and
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* are terminated with a 0xFF for the tuple code or
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* the tuple length.
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*/
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#ifndef _PCCARD_CIS_H
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#define _PCCARD_CIS_H
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#define CIS_NULL 0 /* Empty tuple */
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#define CIS_MEM_COMMON 0x01 /* Device descriptor, common memory */
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#define CIS_LONGLINK_CB 0x02 /* Long link to next chain for CardBus */
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#define CIS_INDIRECT 0x03 /* Indirect access */
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#define CIS_CONF_MAP_CB 0x04 /* Card Configuration map for CardBus */
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#define CIS_CONFIG_CB 0x05 /* Card Configuration entry for CardBus */
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#define CIS_LONGLINK_MFC 0x06 /* Long link to next chain for Multi function card */
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#define CIS_BAR 0x07 /* Base address register for CardBus */
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#define CIS_CHECKSUM 0x10 /* Checksum */
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#define CIS_LONGLINK_A 0x11 /* Link to Attribute memory */
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#define CIS_LONGLINK_C 0x12 /* Link to Common memory */
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#define CIS_LINKTARGET 0x13 /* Linked tuple must start with this. */
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#define CIS_NOLINK 0x14 /* Assume no common memory link tuple. */
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#define CIS_INFO_V1 0x15 /* Card info data, version 1 */
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#define CIS_ALTSTR 0x16 /* Alternate language string tuple. */
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#define CIS_MEM_ATTR 0x17 /* Device descriptor, Attribute memory */
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#define CIS_JEDEC_C 0x18 /* JEDEC descr for common memory */
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#define CIS_JEDEC_A 0x19 /* JEDEC descr for Attribute memory */
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#define CIS_CONF_MAP 0x1A /* Card Configuration map */
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#define CIS_CONFIG 0x1B /* Card Configuration entry */
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#define CIS_DEVICE_OC 0x1C /* Other conditions info - common memory */
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#define CIS_DEVICE_OA 0x1D /* Other conditions info - attribute memory */
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#define CIS_DEVICEGEO 0x1E /* Geometry info for common memory */
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#define CIS_DEVICEGEO_A 0x1F /* Geometry info for attribute memory */
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#define CIS_MANUF_ID 0x20 /* Card manufacturer's ID */
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#define CIS_FUNC_ID 0x21 /* Function of card */
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#define CIS_FUNC_EXT 0x22 /* Functional extension */
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/*
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* Data recording format tuples.
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*/
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#define CIS_SW_INTERLV 0x23 /* Software interleave */
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#define CIS_VERS_2 0x40 /* Card info data, version 2 */
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#define CIS_FORMAT 0x41 /* Memory card format */
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#define CIS_GEOMETRY 0x42 /* Disk sector layout */
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#define CIS_BYTEORDER 0x43 /* Byte order of memory data */
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#define CIS_DATE 0x44 /* Format data/time */
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#define CIS_BATTERY 0x45 /* Battery replacement date */
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#define CIS_ORG 0x46 /* Organization of data on card */
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#define CIS_END 0xFF /* Termination code */
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/*
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* Internal tuple definitions.
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*
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* Device descriptor for memory (CIS_MEM_ATTR, CIS_MEM_COMMON)
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*
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* Byte 1:
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* 0xF0 - Device type
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* 0x08 - Write protect switch
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* 0x07 - Speed index (7 = extended speed)
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* Byte 2: Extended speed (bit 7 = another follows)
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* Byte 3: (ignored if 0xFF)
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* 0xF8 - Addressable units (0's numbered)
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* 0x07 - Unit size
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* The three byte sequence is repeated until byte 1 == 0xFF
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*/
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/*
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* CIS_INFO_V1 - Version one card information.
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*
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* Byte 1: Major version number (should be 4)
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* Byte 2: Minor version number (should be 1)
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* Byte 3-x: Null terminated Manufacturer name
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* Byte x-x: Null terminated product name
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* Byte x-x: Null terminated additional info 1
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* Byte x-x: Null terminated additional info 2
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* Byte x: final byte must be 0xFF
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*/
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#define CIS_MAJOR_VERSION 4
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#define CIS_MINOR_VERSION 1
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/*
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* CIS_CONF_MAP - Provides an address map for the card
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* configuration register(s), and a max value
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* identifying the last configuration tuple.
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*
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* Byte 1:
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* 0x3C - Register mask size (0's numbered)
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* 0x03 - Register address size (0's numbered)
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* Byte 2:
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* 0x3F - ID of last configuration.
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* Byte 3-n: Card register address (size is determined by
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* the value in byte 1).
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* Byte x-x: Card register masks (size determined by the
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* value in byte 1)
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*/
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/*
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* CIS_CONFIG - Card configuration entry. Multiple tuples may
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* exist of this type, each one describing a different
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* memory/I-O map that can be used to address this card.
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* The first one usually has extra config data about the
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* card features. The final configuration tuple number
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* is stored in the CIS_CONF_MAP tuple so that the complete
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* list can be scanned.
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*
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* Byte 1:
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* 0x3F - Configuration ID number.
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* 0x40 - Indicates this is the default configuration
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* 0x80 - Interface byte exists
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* Byte 2: (exists only if bit 0x80 set in byte 1)
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* 0x0F - Interface type value
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* 0x10 - Battery voltage detect
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* 0x20 - Write protect active
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* 0x40 - RdyBsy active bit
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* 0x80 - Wait signal required
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* Byte 3: (features byte)
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* 0x03 - Power sub-tuple(s) exists
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* 0x04 - Timing sub-tuple exists
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* 0x08 - I/O space sub-tuple exists
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* 0x10 - IRQ sub-tuple exists
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* 0x60 - Memory space sub-tuple(s) exists
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* 0x80 - Miscellaneous sub-tuple exists
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*/
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#define CIS_FEAT_POWER(x) ((x) & 0x3)
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#define CIS_FEAT_TIMING 0x4
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#define CIS_FEAT_I_O 0x8
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#define CIS_FEAT_IRQ 0x10
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#define CIS_FEAT_MEMORY(x) (((x) >> 5) & 0x3)
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#define CIS_FEAT_MISC 0x80
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/*
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* Depending on whether the "features" byte has the corresponding
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* bit set, a number of sub-tuples follow. Some features have
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* more than one sub-tuple, depending on the count within the
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* features byte (e.g power feature bits allows up to 3 sub-tuples).
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*
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* Power structure sub-tuple:
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* Byte 1: parameter exists - Each bit (starting from 0x01) indicates
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* that a parameter block exists - up to 8 parameter blocks
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* are therefore allowed).
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* Byte 2:
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* 0x7F - Parameter data
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* 0x80 - More bytes follow (0 = last byte)
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*
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* Timing sub-tuple
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* Byte 1:
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* 0x03 - Wait scale
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* 0x1C - Ready scale
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* 0xE0 - Reserved scale
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* Byte 2: extended wait scale if wait scale != 3
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* Byte 3: extended ready scale if ready scale != 7
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* Byte 4: extended reserved scale if reserved scale != 7
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*/
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#define CIS_WAIT_SCALE(x) ((x) & 0x3)
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#define CIS_READY_SCALE(x) (((x)>>2) & 0x7)
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#define CIS_RESERVED_SCALE(x) (((x)>>5) & 0x7)
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/*
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* I/O mapping sub-tuple:
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* Byte 1:
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* 0x1F - I/O address lines
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* 0x20 - 8 bit I/O
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* 0x40 - 16 bit I/O
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* 0x80 - I/O range??
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* Byte 2:
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* 0x0F - 0's numbered count of I/O block subtuples following.
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* 0x30 - Size of I/O address value within subtuple. Values
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* can be 1 (8 bits), 2 (16 bits) or 3 (32 bits).
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* 0xC0 - Size of I/O port block size value within subtuple.
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* I/O block sub-tuples, count from previous block:
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* Byte 1-n: I/O start address
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* Byte x-x: Size of I/O port block.
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*/
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#define CIS_IO_ADDR(x) ((x) & 0x1F)
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#define CIS_IO_8BIT 0x20
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#define CIS_IO_16BIT 0x40
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#define CIS_IO_RANGE 0x80
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#define CIS_IO_BLKS(x) ((x) & 0xF)
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#define CIS_IO_ADSZ(x) (((x)>>4) & 3)
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#define CIS_IO_BLKSZ(x) (((x)>>6) & 3)
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/*
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* IRQ sub-tuple.
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* Byte 1:
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* 0x0F - Irq number or mask bits
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* 0x10 - IRQ mask values exist
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* 0x20 - Level triggered interrupts
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* 0x40 - Pulse triggered requests
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* 0x80 - Interrupt sharing.
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* Byte 2-3: Interrupt req mask (if 0x10 of byte 1 set).
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*/
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#define CIS_IRQ_IRQN(x) ((x) & 0xF)
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#define CIS_IRQ_MASK 0x10
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#define CIS_IRQ_LEVEL 0x20
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#define CIS_IRQ_PULSE 0x40
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#define CIS_IRQ_SHARING 0x80
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/*
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* Memory block subtuple. Depending on the features bits, the
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* following subtuples are used:
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* mem features == 1
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* Byte 1-2: upper 16 bits of 24 bit memory length.
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* mem features == 2
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* Byte 1-2: upper 16 bits of 24 bit memory length.
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* Byte 3-4: upper 16 bits of 24 bit memory address.
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* mem_features == 3
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* Byte 1:
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* 0x07 - 0's numbered count of memory sub-tuples
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* 0x18 - Memory length size (1's numbered)
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* 0x60 - Memory address size (1's numbered)
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* 0x80 - Host address value exists
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* Memory sub-tuples follow:
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* Byte 1-n: Memory length value (<< 8)
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* Byte n-n: Memory card address value (<< 8)
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* Byte n-n: Memory host address value (<< 8)
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*/
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#define CIS_FEAT_MEM_NONE 0 /* No memory config */
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#define CIS_FEAT_MEM_LEN 1 /* Just length */
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#define CIS_FEAT_MEM_ADDR 2 /* Card address & length */
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#define CIS_FEAT_MEM_WIN 3 /* Multiple windows */
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#define CIS_MEM_WINS(x) (((x) & 0x7)+1)
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#define CIS_MEM_LENSZ(x) (((x) >> 3) & 0x3)
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#define CIS_MEM_ADDRSZ(x) (((x) >> 5) & 0x3)
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#define CIS_MEM_HOST 0x80
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/*
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* Misc sub-tuple.
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* Byte 1:
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* Byte 2:
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* 0x0c - DMA Request Signal
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* 00 - not support DMA
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* 01 - use SPKR# line
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* 10 - use IOIS16# line
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* 11 - use INPACK# line
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* 0x10 - DMA Width
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* 0 - 8 bit DMA
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* 1 - 16 bit DMA
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*/
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#define CIS_MISC_DMA_WIDTH(x) (((x) & 0x10) >> 4)
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#define CIS_MISC_DMA_REQ(x) (((x) >> 2) & 0x3)
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#endif /* _PCCARD_CIS_H */
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