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bf896bd0e2
devices dynamically. That means,
+ only one /dev/iic or /dev/smb device for each smb/iic bus to access
+ I2C/SMB device address must be given to any ioctl
+ new devices may be plugged and accessed after boot, which was
impossible previously (device addresses were hardcoded into
the kernel)
178 lines
3.9 KiB
C
178 lines
3.9 KiB
C
/*-
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* Copyright (c) 1998 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: smbconf.c,v 1.3 1998/11/22 22:01:42 nsouch Exp $
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <dev/smbus/smbconf.h>
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#include <dev/smbus/smbus.h>
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#include "smbus_if.h"
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/*
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* smbus_intr()
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*/
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void
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smbus_intr(device_t bus, u_char devaddr, char low, char high, int error)
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{
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struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
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/* call owner's intr routine */
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if (sc->owner)
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SMBUS_INTR(sc->owner, devaddr, low, high, error);
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return;
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}
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/*
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* smbus_alloc_bus()
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*
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* Allocate a new bus connected to the given parent device
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*/
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device_t
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smbus_alloc_bus(device_t parent)
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{
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device_t child;
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/* add the bus to the parent */
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child = device_add_child(parent, "smbus", -1, NULL);
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return (child);
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}
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static int
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smbus_poll(struct smbus_softc *sc, int how)
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{
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int error;
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switch (how) {
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case (SMB_WAIT | SMB_INTR):
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error = tsleep(sc, SMBPRI|PCATCH, "smbreq", 0);
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break;
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case (SMB_WAIT | SMB_NOINTR):
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error = tsleep(sc, SMBPRI, "smbreq", 0);
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break;
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default:
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return (EWOULDBLOCK);
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break;
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}
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return (error);
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}
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/*
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* smbus_request_bus()
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*
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* Allocate the device to perform transfers.
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*
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* how : SMB_WAIT or SMB_DONTWAIT
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*/
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int
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smbus_request_bus(device_t bus, device_t dev, int how)
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{
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struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
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int s, error = 0;
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/* first, ask the underlying layers if the request is ok */
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do {
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error = SMBUS_CALLBACK(device_get_parent(bus),
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SMB_REQUEST_BUS, (caddr_t)&how);
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if (error)
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error = smbus_poll(sc, how);
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} while (error);
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while (!error) {
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s = splhigh();
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if (sc->owner) {
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splx(s);
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error = smbus_poll(sc, how);
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} else {
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sc->owner = dev;
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splx(s);
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return (0);
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}
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}
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return (error);
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}
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/*
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* smbus_release_bus()
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*
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* Release the device allocated with smbus_request_dev()
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*/
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int
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smbus_release_bus(device_t bus, device_t dev)
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{
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struct smbus_softc *sc = (struct smbus_softc *)device_get_softc(bus);
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int s, error;
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/* first, ask the underlying layers if the release is ok */
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error = SMBUS_CALLBACK(device_get_parent(bus), SMB_RELEASE_BUS, NULL);
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if (error)
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return (error);
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s = splhigh();
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if (sc->owner != dev) {
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splx(s);
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return (EACCES);
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}
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sc->owner = 0;
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splx(s);
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/* wakeup waiting processes */
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wakeup(sc);
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return (0);
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}
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/*
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* smbus_get_addr()
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*
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* Get the I2C 7 bits address of the device
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*/
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u_char
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smbus_get_addr(device_t dev)
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{
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uintptr_t addr;
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device_t parent = device_get_parent(dev);
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BUS_READ_IVAR(parent, dev, SMBUS_IVAR_ADDR, &addr);
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return ((u_char)addr);
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}
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