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PCI bus interface. I have made some modifications to this manual page, so it looks a bit different from the original version that was posted to me. Submitted by: Bruce M. Simpson <bms@spc.org> Reviewed by: imp, mdodd (early copy) Approved by: des (mentor) MFC after: 3 days
241 lines
6.1 KiB
Groff
241 lines
6.1 KiB
Groff
.\"
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.\" Copyright (c) 2003 Bruce M Simpson <bms@spc.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd May 21, 2003
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.Dt PCI 9
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.Os
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.Sh NAME
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.Nm pci ,
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.Nm pci_read_config ,
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.Nm pci_write_config ,
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.Nm pci_enable_busmaster ,
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.Nm pci_disable_busmaster ,
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.Nm pci_enable_io ,
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.Nm pci_disable_io ,
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.Nm pci_set_powerstate ,
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.Nm pci_get_powerstate ,
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.Nm pci_find_bsf ,
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.Nm pci_find_device
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.Nd PCI bus interface
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.Sh SYNOPSIS
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.In sys/bus.h
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.In dev/pci/pcivar.h
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.In dev/pci/pcireg.h
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.In machine/pci_cfgreg.h
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.Pp
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.Ft void
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.Fn pci_write_config "device_t dev" "int reg" "u_int32_t val" "int width"
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.Ft int
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.Fn pci_enable_busmaster "device_t dev"
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.Ft int
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.Fn pci_disable_busmaster "device_t dev"
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.Ft int
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.Fn pci_enable_io "device_t dev" "int space"
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.Ft int
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.Fn pci_disable_io "device_t dev" "int space"
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.Ft int
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.Fn pci_set_powerstate "device_t dev" "int state"
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.Ft int
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.Fn pci_get_powerstate "device_t dev"
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.Ft u_int32_t
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.Fn pci_read_config "device_t dev" "int reg" "int width"
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.Ft device_t
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.Fn pci_find_bsf "u_int8_t" "u_int8_t" "u_int8_t"
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.Ft device_t
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.Fn pci_find_device "u_int16_t" "u_int16_t"
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.Sh DESCRIPTION
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The
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.Nm
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set of functions are used for managing PCI devices.
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.Pp
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The
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.Fn pci_read_config
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function is used to read data from the PCI configuration
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space of the device
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.Fa dev ,
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at offset
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.Fa reg ,
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with
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.Fa width
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specifying the size of the access.
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.Pp
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The
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.Fn pci_write_config
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function is used to write the value
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.Fa val
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to the PCI configuration
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space of the device
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.Fa dev ,
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at offset
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.Fa reg ,
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with
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.Fa width
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specifying the size of the access.
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.Pp
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The
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.Fn pci_enable_busmaster
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function enables PCI bus mastering for the device
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.Fa dev ,
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by setting the
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.Dv PCIM_CMD_BUSMASTEREN
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bit in the
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.Dv PCIR_COMMAND
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register.
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The
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.Fn pci_disable_busmaster
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function clears this bit.
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.Pp
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The
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.Fn pci_enable_io
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function enables memory or I/O port address decoding for the device
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.Fa dev ,
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by setting the
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.Dv PCIM_CMD_MEMEN
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or
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.Dv PCIM_CMD_PORTEN
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bit in the
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.Dv PCIR_COMMAND
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register appropriately. The
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.Fn pci_disable_io
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function clears the appropriate bit.
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The
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.Fa state
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argument specifies which resource is affected; this can be either
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.Dv SYS_RES_MEMORY
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or
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.Dv SYS_RES_IOPORT
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as appropriate.
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.Pp
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.Em NOTE :
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These functions should be used in preference to manually manipulating
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the configuration space.
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.Pp
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The
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.Fn pci_get_powerstate
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function returns the current ACPI power state of the device
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.Fa dev .
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If the device does not support power management capabilities, then the default
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state of
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.Dv PCI_POWERSTATE_D0
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is returned.
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The following power states are defined by ACPI:
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.Bl -hang -width PCI_POWERSTATE_UNKNOWN
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.It Dv PCI_POWERSTATE_D0
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State in which device is on and running.
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It is receiving full power from the system and delivering
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full functionality to the user.
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.It Dv PCI_POWERSTATE_D1
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Class-specific low-power state in which device context may or
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may not be lot.
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Buses in this state cannot do anything to the bus, to
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force devices to loose context.
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.It Dv PCI_POWERSTATE_D2
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Class-specific low-power state in which device context may or
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may not be lost.
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Attains greater power savings than
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.Dv PCI_POWERSTATE_D1 .
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Buses in this state can cause devices to loose some context.
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Devices
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.Em must
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be prepared for the bus to be in this state or higher.
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.It Dv PCI_POWERSTATE_D3
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State in which the device is off and not running.
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Device context is lost, and power from the device can
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be removed.
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.It Dv PCI_POWERSTATE_UNKNOWN
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State of the device is unknown.
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.El
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.Pp
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The
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.Fn pci_set_powerstate
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function is used to transition the device
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.Fa dev
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to the ACPI power state
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.Fa state .
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It checks to see if the device is PCI 2.2 compliant.
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If so, it checks the
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capabilities pointer to determine which power states the device supports.
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If the device does not have power management capabilities, the default state
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of
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.Dv PCI_POWERSTATE_D0
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is set.
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.Pp
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The
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.Fn pci_find_bsf
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function looks up the
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.Vt device_t
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of a PCI device, given its
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.Fa bus ,
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.Fa slot ,
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and
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.Fa function .
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.Pp
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The
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.Fn pci_find_device
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function looks up the
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.Vt device_t
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of a PCI device, given its
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.Fa vendor
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and
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.Fa device
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IDs. Note that there can be multiple matches for this search; this function
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only returns the first matching device.
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.Sh IMPLEMENTATION NOTES
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The
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.Vt pci_addr_t
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type is varies according to the size of the PCI bus address
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space on the target architecture.
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.Sh SEE ALSO
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.Xr bus_alloc_resource 9 ,
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.Xr bus_dma 9 ,
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.Xr bus_release_resource 9 ,
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.Xr bus_setup_intr 9 ,
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.Xr bus_teardown_intr 9 ,
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.Xr devclass 9 ,
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.Xr device 9 ,
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.Xr driver 9 ,
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.Xr rman 9
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.Rs
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.%B FreeBSD Developers' Handbook
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.%T NewBus
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.%O http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/developers-handbook/
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.Re
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.Rs
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.%A Shanley
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.%A Anderson
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.%B PCI System Architecture
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.%N 2nd Edition
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.%I Addison-Wesley
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.%O ISBN 0-201-30974-2
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.Re
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.Sh AUTHORS
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This man page was written by
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.An Bruce M Simpson Aq bms@spc.org .
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.Sh BUGS
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This manual page does not yet document PAE and how it affects memory-space
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mapping of PCI devices.
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