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107 lines
3.5 KiB
C
107 lines
3.5 KiB
C
/*
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* All Rights Reserved, Copyright (C) Fujitsu Limited 1995
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*
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* This software may be used, modified, copied, distributed, and sold,
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* in both source and binary form provided that the above copyright,
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* these terms and the following disclaimer are retained. The name of
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* the author and/or the contributor may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#define FE_REG_VERSION "if_fereg.h ver. 0.8"
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/*
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* Hardware specification of various 86960/86965 based Ethernet cards.
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* Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp>
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*/
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/*
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* Registers on FMV-180 series' ISA bus interface ASIC.
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* I'm not sure the following register names are appropriate.
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* Doesn't it look silly, eh? FIXME.
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*/
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#define FE_FMV0 16 /* Hardware status. */
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#define FE_FMV1 17 /* Hardrare type? Always 0 */
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#define FE_FMV2 18 /* Hardware configuration. */
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#define FE_FMV3 19 /* Hardware enable. */
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#define FE_FMV4 20 /* Station address #1 */
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#define FE_FMV5 21 /* Station address #2 */
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#define FE_FMV6 22 /* Station address #3 */
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#define FE_FMV7 23 /* Station address #4 */
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#define FE_FMV8 24 /* Station address #5 */
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#define FE_FMV9 25 /* Station address #6 */
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#define FE_FMV10 26 /* Unknown; to be set to 0. */
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/*
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* FMV-180 series' ASIC register values.
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*/
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/* Magic value in FMV0 register. */
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#define FE_FMV0_MAGIC_MASK 0x78
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#define FE_FMV0_MAGIC_VALUE 0x50
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/* Model identification. */
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#define FE_FMV0_MODEL 0x07
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#define FE_FMV0_MODEL_FMV181 0x05
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#define FE_FMV0_MODEL_FMV182 0x03
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/* Card type ID? Always 0? */
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#define FE_FMV1_CARDID_MASK 0xFF
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#define FE_FMV1_CARDID_ID 0x00
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/* I/O port address assignment. */
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#define FE_FMV2_ADDR 0x07
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#define FE_FMV2_ADDR_SHIFT 0
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/* Boot ROM address assignment. */
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#define FE_FMV2_ROM 0x38
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#define FE_FMV2_ROM_SHIFT 3
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/* IRQ assignment. */
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#define FE_FMV2_IRQ 0xC0
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#define FE_FMV2_IRQ_SHIFT 6
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/* Hardware(?) enable flag. */
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#define FE_FMV3_ENABLE_FLAG 0x80
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/* Extra bits in FMV3 register. Always 0? */
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#define FE_FMV3_EXTRA_MASK 0x7F
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#define FE_FMV3_EXTRA_VALUE 0x00
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/*
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* EEPROM allocation of AT1700/RE2000.
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*/
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#define FE_EEP_ATI_ADDR 8 /* Station address. (8-13) */
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#define FE_EEP_ATI_TYPE 25 /* Hardware type? FIXME. */
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#define FE_EEP_ATI_TYPE_HIGHIRQ 0x04 /* IRQ delivery? FIXME. */
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/*
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* Registers on MBH10302.
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*/
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#define FE_MBH0 0x10 /* ??? Including interrupt. */
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#define FE_MBH1 0x11 /* ??? */
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#define FE_MBH10 0x1A /* Station address. (10 - 15) */
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/* Values to be set in MBH0 register. */
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#define FE_MBH0_MAGIC 0x0D /* Just a magic constant? */
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#define FE_MBH0_INTR 0x10 /* Master interrupt control. */
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#define FE_MBH0_INTR_ENABLE 0x10 /* Enable interrupts. */
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#define FE_MBH0_INTR_DISABLE 0x00 /* Disable interrupts. */
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