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370808da5f
Reviewed by: rdivacky, zml Approved by: zml (mentor)
384 lines
12 KiB
C
384 lines
12 KiB
C
/*-
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* Copyright (c) 1999,2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Copyright (c) 2002 Eric Moore
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* Copyright (c) 2002 LSI Logic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The party using or redistributing the source code and binary forms
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* agrees to the disclaimer below and the terms and conditions set forth
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* herein.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*
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* $FreeBSD$
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*/
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#include <geom/geom_disk.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#define LSI_DESC_PCI "LSILogic MegaRAID 1.53"
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#ifdef AMR_DEBUG
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# define debug(level, fmt, args...) do {if (level <= AMR_DEBUG) printf("%s: " fmt "\n", __func__ , ##args);} while(0)
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# define debug_called(level) do {if (level <= AMR_DEBUG) printf("%s: called\n", __func__);} while(0)
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#else
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# define debug(level, fmt, args...) do {} while (0)
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# define debug_called(level) do {} while (0)
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#endif
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#define xdebug(fmt, args...) printf("%s: " fmt "\n", __func__ , ##args)
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/*
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* Per-logical-drive datastructure
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*/
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struct amr_logdrive
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{
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u_int32_t al_size;
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int al_state;
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int al_properties;
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/* synthetic geometry */
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int al_cylinders;
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int al_heads;
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int al_sectors;
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/* driver */
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device_t al_disk;
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};
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/*
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* Due to the difficulty of using the zone allocator to create a new
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* zone from within a module, we use our own clustering to reduce
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* memory wastage due to allocating lots of these small structures.
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*
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* 16k gives us a little under 200 command structures, which should
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* normally be plenty. We will grab more if we need them.
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*/
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#define AMR_CMD_CLUSTERSIZE (16 * 1024)
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typedef STAILQ_HEAD(, amr_command) ac_qhead_t;
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typedef STAILQ_ENTRY(amr_command) ac_link_t;
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union amr_ccb {
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struct amr_passthrough ccb_pthru;
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struct amr_ext_passthrough ccb_epthru;
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uint8_t bytes[128];
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};
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/*
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* Per-command control structure.
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*/
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struct amr_command
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{
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ac_link_t ac_link;
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struct amr_softc *ac_sc;
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u_int8_t ac_slot;
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int ac_status; /* command completion status */
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union {
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struct amr_sgentry *sg32;
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struct amr_sg64entry *sg64;
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} ac_sg;
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u_int32_t ac_sgbusaddr;
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u_int32_t ac_sg64_lo;
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u_int32_t ac_sg64_hi;
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struct amr_mailbox ac_mailbox;
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int ac_flags;
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#define AMR_CMD_DATAIN (1<<0)
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#define AMR_CMD_DATAOUT (1<<1)
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#define AMR_CMD_CCB (1<<2)
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#define AMR_CMD_PRIORITY (1<<4)
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#define AMR_CMD_MAPPED (1<<5)
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#define AMR_CMD_SLEEP (1<<6)
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#define AMR_CMD_BUSY (1<<7)
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#define AMR_CMD_SG64 (1<<8)
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#define AC_IS_SG64(ac) ((ac)->ac_flags & AMR_CMD_SG64)
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u_int ac_retries;
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struct bio *ac_bio;
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void (* ac_complete)(struct amr_command *ac);
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void *ac_private;
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void *ac_data;
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size_t ac_length;
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bus_dmamap_t ac_dmamap;
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bus_dmamap_t ac_dma64map;
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bus_dma_tag_t ac_tag;
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bus_dmamap_t ac_datamap;
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int ac_nsegments;
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uint32_t ac_mb_physaddr;
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union amr_ccb *ac_ccb;
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uint32_t ac_ccb_busaddr;
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};
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struct amr_command_cluster
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{
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TAILQ_ENTRY(amr_command_cluster) acc_link;
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struct amr_command acc_command[0];
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};
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#define AMR_CMD_CLUSTERCOUNT ((AMR_CMD_CLUSTERSIZE - sizeof(struct amr_command_cluster)) / \
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sizeof(struct amr_command))
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/*
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* Per-controller-instance data
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*/
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struct amr_softc
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{
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/* bus attachments */
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device_t amr_dev;
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struct resource *amr_reg; /* control registers */
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bus_space_handle_t amr_bhandle;
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bus_space_tag_t amr_btag;
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bus_dma_tag_t amr_parent_dmat; /* parent DMA tag */
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bus_dma_tag_t amr_buffer_dmat; /* data buffer DMA tag */
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bus_dma_tag_t amr_buffer64_dmat;
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struct resource *amr_irq; /* interrupt */
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void *amr_intr;
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/* mailbox */
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volatile struct amr_mailbox *amr_mailbox;
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volatile struct amr_mailbox64 *amr_mailbox64;
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u_int32_t amr_mailboxphys;
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bus_dma_tag_t amr_mailbox_dmat;
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bus_dmamap_t amr_mailbox_dmamap;
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/* scatter/gather lists and their controller-visible mappings */
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struct amr_sgentry *amr_sgtable; /* s/g lists */
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struct amr_sg64entry *amr_sg64table; /* 64bit s/g lists */
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u_int32_t amr_sgbusaddr; /* s/g table base address in bus space */
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bus_dma_tag_t amr_sg_dmat; /* s/g buffer DMA tag */
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bus_dmamap_t amr_sg_dmamap; /* map for s/g buffers */
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union amr_ccb *amr_ccb;
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uint32_t amr_ccb_busaddr;
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bus_dma_tag_t amr_ccb_dmat;
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bus_dmamap_t amr_ccb_dmamap;
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/* controller limits and features */
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int amr_nextslot; /* Next slot to use for newly allocated commands */
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int amr_maxio; /* maximum number of I/O transactions */
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int amr_maxdrives; /* max number of logical drives */
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int amr_maxchan; /* count of SCSI channels */
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/* connected logical drives */
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struct amr_logdrive amr_drive[AMR_MAXLD];
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/* controller state */
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int amr_state;
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#define AMR_STATE_OPEN (1<<0)
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#define AMR_STATE_SUSPEND (1<<1)
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#define AMR_STATE_INTEN (1<<2)
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#define AMR_STATE_SHUTDOWN (1<<3)
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#define AMR_STATE_CRASHDUMP (1<<4)
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#define AMR_STATE_QUEUE_FRZN (1<<5)
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#define AMR_STATE_LD_DELETE (1<<6)
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#define AMR_STATE_REMAP_LD (1<<7)
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/* per-controller queues */
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struct bio_queue_head amr_bioq; /* pending I/O with no commands */
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ac_qhead_t amr_ready; /* commands ready to be submitted */
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struct amr_command *amr_busycmd[AMR_MAXCMD];
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int amr_busyslots;
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ac_qhead_t amr_freecmds;
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TAILQ_HEAD(,amr_command_cluster) amr_cmd_clusters;
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/* CAM attachments for passthrough */
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struct cam_sim *amr_cam_sim[AMR_MAX_CHANNELS];
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TAILQ_HEAD(, ccb_hdr) amr_cam_ccbq;
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struct cam_devq *amr_cam_devq;
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/* control device */
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struct cdev *amr_dev_t;
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struct mtx amr_list_lock;
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/* controller type-specific support */
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int amr_type;
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#define AMR_TYPE_QUARTZ (1<<0)
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#define AMR_IS_QUARTZ(sc) ((sc)->amr_type & AMR_TYPE_QUARTZ)
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#define AMR_TYPE_40LD (1<<1)
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#define AMR_IS_40LD(sc) ((sc)->amr_type & AMR_TYPE_40LD)
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#define AMR_TYPE_SG64 (1<<2)
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#define AMR_IS_SG64(sc) ((sc)->amr_type & AMR_TYPE_SG64)
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int (* amr_submit_command)(struct amr_command *ac);
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int (* amr_get_work)(struct amr_softc *sc, struct amr_mailbox *mbsave);
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int (*amr_poll_command)(struct amr_command *ac);
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int (*amr_poll_command1)(struct amr_softc *sc, struct amr_command *ac);
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int support_ext_cdb; /* greater than 10 byte cdb support */
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/* misc glue */
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device_t amr_pass;
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int (*amr_cam_command)(struct amr_softc *sc, struct amr_command **acp);
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struct intr_config_hook amr_ich; /* wait-for-interrupts probe hook */
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struct callout_handle amr_timeout; /* periodic status check */
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int amr_allow_vol_config;
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int amr_linux_no_adapters;
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int amr_ld_del_supported;
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struct mtx amr_hw_lock;
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};
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/*
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* Interface between bus connections and driver core.
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*/
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extern int amr_attach(struct amr_softc *sc);
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extern void amr_free(struct amr_softc *sc);
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extern int amr_flush(struct amr_softc *sc);
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extern int amr_done(struct amr_softc *sc);
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extern void amr_startio(struct amr_softc *sc);
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/*
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* Command buffer allocation.
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*/
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extern struct amr_command *amr_alloccmd(struct amr_softc *sc);
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extern void amr_releasecmd(struct amr_command *ac);
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/*
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* MegaRAID logical disk driver
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*/
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struct amrd_softc
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{
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device_t amrd_dev;
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struct amr_softc *amrd_controller;
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struct amr_logdrive *amrd_drive;
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struct disk *amrd_disk;
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int amrd_unit;
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};
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/*
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* Interface between driver core and disk driver (should be using a bus?)
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*/
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extern int amr_submit_bio(struct amr_softc *sc, struct bio *bio);
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extern int amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks);
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extern void amrd_intr(void *data);
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/********************************************************************************
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* Enqueue/dequeue functions
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*/
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static __inline void
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amr_enqueue_bio(struct amr_softc *sc, struct bio *bio)
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{
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bioq_insert_tail(&sc->amr_bioq, bio);
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}
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static __inline struct bio *
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amr_dequeue_bio(struct amr_softc *sc)
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{
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struct bio *bio;
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if ((bio = bioq_first(&sc->amr_bioq)) != NULL)
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bioq_remove(&sc->amr_bioq, bio);
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return(bio);
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}
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static __inline void
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amr_init_qhead(ac_qhead_t *head)
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{
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STAILQ_INIT(head);
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}
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static __inline void
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amr_enqueue_ready(struct amr_command *ac)
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{
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STAILQ_INSERT_TAIL(&ac->ac_sc->amr_ready, ac, ac_link);
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}
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static __inline void
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amr_requeue_ready(struct amr_command *ac)
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{
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STAILQ_INSERT_HEAD(&ac->ac_sc->amr_ready, ac, ac_link);
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}
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static __inline struct amr_command *
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amr_dequeue_ready(struct amr_softc *sc)
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{
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struct amr_command *ac;
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if ((ac = STAILQ_FIRST(&sc->amr_ready)) != NULL)
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STAILQ_REMOVE_HEAD(&sc->amr_ready, ac_link);
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return(ac);
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}
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static __inline void
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amr_enqueue_completed(struct amr_command *ac, ac_qhead_t *head)
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{
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STAILQ_INSERT_TAIL(head, ac, ac_link);
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}
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static __inline struct amr_command *
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amr_dequeue_completed(struct amr_softc *sc, ac_qhead_t *head)
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{
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struct amr_command *ac;
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if ((ac = STAILQ_FIRST(head)) != NULL)
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STAILQ_REMOVE_HEAD(head, ac_link);
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return(ac);
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}
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static __inline void
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amr_enqueue_free(struct amr_command *ac)
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{
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STAILQ_INSERT_HEAD(&ac->ac_sc->amr_freecmds, ac, ac_link);
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}
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static __inline struct amr_command *
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amr_dequeue_free(struct amr_softc *sc)
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{
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struct amr_command *ac;
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if ((ac = STAILQ_FIRST(&sc->amr_freecmds)) != NULL)
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STAILQ_REMOVE_HEAD(&sc->amr_freecmds, ac_link);
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return(ac);
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}
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