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de57160389
a revision ID of 0x0f (D102 E-step). MFC after: 2 weeks Tested by: pav
1258 lines
22 KiB
C
1258 lines
22 KiB
C
/*-
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Copyright (c) 1999-2001, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of Intel Corporation nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $FreeBSD$
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*/
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/*
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rcvbundl.h
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Author: Patrick J Luhmann (PJL)
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Date: 05/30/2000
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Version: 3.28
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This file contains the loadable micro code arrays to implement receive bundling on the
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D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
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D102 B-step with TCO work around, D102 C-step and D102 E-step.
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Each controller has its own specific micro code array. The array for one controller
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is totally incompatible with any other controller, and if used will most likely
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cause the controller to lock up and stop responding to the driver. Each micro
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code array has its own parameter offsets (described below), and they each have
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their own version number (which should not be confused with the version of the
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rcvbundl.h file given above).
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*/
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/*************************************************************************
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* CPUSaver parameters
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*
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* All CPUSaver parameters are 16-bit literals that are part of a
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* "move immediate value" instruction. By changing the value of
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* the literal in the instruction before the code is loaded, the
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* driver can change algorithm.
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*
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* CPUSAVER_DWORD - This is the location of the instruction that loads
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* the dead-man timer with its inital value. By writing a 16-bit
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* value to the low word of this instruction, the driver can change
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* the timer value. The current default is either x600 or x800;
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* experiments show that the value probably should stay within the
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* range of x200 - x1000.
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*
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* CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
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* that sets the maximum number of frames that will be bundled. In
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* some situations, such as the TCP windowing algorithm, it may be
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* better to limit the growth of the bundle size than let it go as
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* high as it can, because that could cause too much added latency.
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* The default is six, because this is the number of packets in the
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* default TCP window size. A value of 1 would make CPUSaver indicate
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* an interrupt for every frame received. If you do not want to put
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* a limit on the bundle size, set this value to xFFFF.
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*
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* CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
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* that contains a bit-mask describing the minimum size frame that
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* will be bundled. The default masks the lower 7 bits, which means
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* that any frame less than 128 bytes in length will not be bundled,
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* but will instead immediately generate an interrupt. This does
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* not affect the current bundle in any way. Any frame that is 128
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* bytes or large will be bundled normally. This feature is meant
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* to provide immediate indication of ACK frames in a TCP environment.
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* Customers were seeing poor performance when a machine with CPUSaver
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* enabled was sending but not receiving. The delay introduced when
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* the ACKs were received was enough to reduce total throughput, because
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* the sender would sit idle until the ACK was finally seen.
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*
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* The current default is 0xFF80, which masks out the lower 7 bits.
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* This means that any frame which is x7F (127) bytes or smaller
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* will cause an immediate interrupt. Because this value must be a
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* bit mask, there are only a few valid values that can be used. To
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* turn this feature off, the driver can write the value xFFFF to the
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* lower word of this instruction (in the same way that the other
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* parameters are used). Likewise, a value of 0xF800 (2047) would
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* cause an interrupt to be generated for every frame, because all
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* standard Ethernet frames are <= 2047 bytes in length.
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*************************************************************************/
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/********************************************************/
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/* CPUSaver micro code for the D101A */
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/********************************************************/
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/* Version 2.0 */
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/* This value is the same for both A and B step of 558. */
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#define D101_CPUSAVER_DWORD 72
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#define D101_A_RCVBUNDLE_UCODE \
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{\
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0x03B301BB, \
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0x0046FFFF, \
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0xFFFFFFFF, \
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0x051DFFFF, \
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0xFFFFFFFF, \
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0xFFFFFFFF, \
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0x000C0001, \
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0x00101212, \
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0x000C0008, \
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0x003801BC, \
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0x00000000, \
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0x00124818, \
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0x000C1000, \
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0x00220809, \
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0x00010200, \
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0x00124818, \
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0x000CFFFC, \
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0x003803B5, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x0010009C, \
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0x0024B81D, \
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0x00130836, \
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0x000C0001, \
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0x0026081C, \
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0x0020C81B, \
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0x00130824, \
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0x00222819, \
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0x00101213, \
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0x00041000, \
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0x003A03B3, \
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0x00010200, \
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0x00101B13, \
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0x00238081, \
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0x00213049, \
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0x0038003B, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x0010009C, \
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0x0024B83E, \
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0x00130826, \
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0x000C0001, \
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0x0026083B, \
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0x00010200, \
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0x00134824, \
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0x000C0001, \
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0x00101213, \
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0x00041000, \
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0x0038051E, \
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0x00101313, \
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0x00010400, \
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0x00380521, \
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0x00050600, \
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0x00100824, \
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0x00101310, \
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0x00041000, \
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0x00080600, \
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0x00101B10, \
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0x0038051E, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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}
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/********************************************************/
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/* CPUSaver micro code for the D101B */
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/********************************************************/
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/* Version 2.0 */
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#define D101_B0_RCVBUNDLE_UCODE \
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{\
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0x03B401BC, \
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0x0047FFFF, \
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0xFFFFFFFF, \
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0x051EFFFF, \
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0xFFFFFFFF, \
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0xFFFFFFFF, \
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0x000C0001, \
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0x00101B92, \
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0x000C0008, \
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0x003801BD, \
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0x00000000, \
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0x00124818, \
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0x000C1000, \
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0x00220809, \
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0x00010200, \
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0x00124818, \
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0x000CFFFC, \
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0x003803B6, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x0010009C, \
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0x0024B81D, \
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0x0013082F, \
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0x000C0001, \
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0x0026081C, \
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0x0020C81B, \
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0x00130837, \
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0x00222819, \
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0x00101B93, \
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0x00041000, \
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0x003A03B4, \
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0x00010200, \
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0x00101793, \
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0x00238082, \
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0x0021304A, \
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0x0038003C, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x0010009C, \
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0x0024B83E, \
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0x00130826, \
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0x000C0001, \
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0x0026083B, \
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0x00010200, \
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0x00134837, \
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0x000C0001, \
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0x00101B93, \
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0x00041000, \
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0x0038051F, \
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0x00101313, \
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0x00010400, \
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0x00380522, \
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0x00050600, \
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0x00100837, \
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0x00101310, \
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0x00041000, \
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0x00080600, \
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0x00101790, \
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0x0038051F, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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}
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/********************************************************/
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/* CPUSaver micro code for the D101M (B-step only) */
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/********************************************************/
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/* Version 2.10 */
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/* Parameter values for the D101M B-step */
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#define D101M_CPUSAVER_DWORD 78
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#define D101M_CPUSAVER_BUNDLE_MAX_DWORD 65
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#define D101M_CPUSAVER_MIN_SIZE_DWORD 126
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#define D101M_B_RCVBUNDLE_UCODE \
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{\
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0x00550215, \
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0xFFFF0437, \
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0xFFFFFFFF, \
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0x06A70789, \
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0xFFFFFFFF, \
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0x0558FFFF, \
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0x000C0001, \
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0x00101312, \
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0x000C0008, \
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0x00380216, \
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0x0010009C, \
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0x00204056, \
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0x002380CC, \
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0x00380056, \
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0x0010009C, \
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0x00244C0B, \
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0x00000800, \
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0x00124818, \
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0x00380438, \
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0x00000000, \
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0x00140000, \
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0x00380555, \
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0x00308000, \
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0x00100662, \
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0x00100561, \
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0x000E0408, \
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0x00134861, \
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0x000C0002, \
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0x00103093, \
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0x00308000, \
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0x00100624, \
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0x00100561, \
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0x000E0408, \
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0x00100861, \
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0x000C007E, \
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0x00222C21, \
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0x000C0002, \
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0x00103093, \
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0x00380C7A, \
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0x00080000, \
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0x00103090, \
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0x00380C7A, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x0010009C, \
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0x00244C2D, \
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0x00010004, \
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0x00041000, \
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0x003A0437, \
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0x00044010, \
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0x0038078A, \
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0x00000000, \
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0x00100099, \
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0x00206C7A, \
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0x0010009C, \
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0x00244C48, \
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0x00130824, \
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0x000C0001, \
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0x00101213, \
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0x00260C75, \
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0x00041000, \
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0x00010004, \
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0x00130826, \
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0x000C0006, \
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0x002206A8, \
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0x0013C926, \
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0x00101313, \
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0x003806A8, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00080600, \
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0x00101B10, \
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0x00050004, \
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0x00100826, \
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0x00101210, \
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0x00380C34, \
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0x00000000, \
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0x00000000, \
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0x0021155B, \
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0x00100099, \
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0x00206559, \
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0x0010009C, \
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0x00244559, \
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0x00130836, \
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0x000C0000, \
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0x00220C62, \
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0x000C0001, \
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0x00101B13, \
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0x00229C0E, \
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0x00210C0E, \
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0x00226C0E, \
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0x00216C0E, \
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0x0022FC0E, \
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0x00215C0E, \
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0x00214C0E, \
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0x00380555, \
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0x00010004, \
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0x00041000, \
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0x00278C67, \
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0x00040800, \
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0x00018100, \
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0x003A0437, \
|
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0x00130826, \
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0x000C0001, \
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0x00220559, \
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0x00101313, \
|
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0x00380559, \
|
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0x00000000, \
|
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0x00000000, \
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0x00000000, \
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0x00000000, \
|
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00130831, \
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0x0010090B, \
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0x00124813, \
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0x000CFF80, \
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0x002606AB, \
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0x00041000, \
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0x003806A8, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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}
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/********************************************************/
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/* CPUSaver micro code for the D101S */
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/********************************************************/
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/* Version 1.20 */
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/* Parameter values for the D101S */
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#define D101S_CPUSAVER_DWORD 78
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#define D101S_CPUSAVER_BUNDLE_MAX_DWORD 67
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#define D101S_CPUSAVER_MIN_SIZE_DWORD 129
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#define D101S_RCVBUNDLE_UCODE \
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{\
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0x00550242, \
|
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0xFFFF047E, \
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0xFFFFFFFF, \
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0x06FF0818, \
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0xFFFFFFFF, \
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0x05A6FFFF, \
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0x000C0001, \
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0x00101312, \
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0x000C0008, \
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0x00380243, \
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0x0010009C, \
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0x00204056, \
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0x002380D0, \
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0x00380056, \
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0x0010009C, \
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0x00244F8B, \
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0x00000800, \
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0x00124818, \
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0x0038047F, \
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0x00000000, \
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0x00140000, \
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0x003805A3, \
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0x00308000, \
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0x00100610, \
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0x00100561, \
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0x000E0408, \
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0x00134861, \
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0x000C0002, \
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0x00103093, \
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0x00308000, \
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0x00100624, \
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0x00100561, \
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0x000E0408, \
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0x00100861, \
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0x000C007E, \
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0x00222FA1, \
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0x000C0002, \
|
|
0x00103093, \
|
|
0x00380F90, \
|
|
0x00080000, \
|
|
0x00103090, \
|
|
0x00380F90, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x0010009C, \
|
|
0x00244FAD, \
|
|
0x00010004, \
|
|
0x00041000, \
|
|
0x003A047E, \
|
|
0x00044010, \
|
|
0x00380819, \
|
|
0x00000000, \
|
|
0x00100099, \
|
|
0x00206FFD, \
|
|
0x0010009A, \
|
|
0x0020AFFD, \
|
|
0x0010009C, \
|
|
0x00244FC8, \
|
|
0x00130824, \
|
|
0x000C0001, \
|
|
0x00101213, \
|
|
0x00260FF8, \
|
|
0x00041000, \
|
|
0x00010004, \
|
|
0x00130826, \
|
|
0x000C0006, \
|
|
0x00220700, \
|
|
0x0013C926, \
|
|
0x00101313, \
|
|
0x00380700, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00080600, \
|
|
0x00101B10, \
|
|
0x00050004, \
|
|
0x00100826, \
|
|
0x00101210, \
|
|
0x00380FB6, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x002115A9, \
|
|
0x00100099, \
|
|
0x002065A7, \
|
|
0x0010009A, \
|
|
0x0020A5A7, \
|
|
0x0010009C, \
|
|
0x002445A7, \
|
|
0x00130836, \
|
|
0x000C0000, \
|
|
0x00220FE4, \
|
|
0x000C0001, \
|
|
0x00101B13, \
|
|
0x00229F8E, \
|
|
0x00210F8E, \
|
|
0x00226F8E, \
|
|
0x00216F8E, \
|
|
0x0022FF8E, \
|
|
0x00215F8E, \
|
|
0x00214F8E, \
|
|
0x003805A3, \
|
|
0x00010004, \
|
|
0x00041000, \
|
|
0x00278FE9, \
|
|
0x00040800, \
|
|
0x00018100, \
|
|
0x003A047E, \
|
|
0x00130826, \
|
|
0x000C0001, \
|
|
0x002205A7, \
|
|
0x00101313, \
|
|
0x003805A7, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00130831, \
|
|
0x0010090B, \
|
|
0x00124813, \
|
|
0x000CFF80, \
|
|
0x00260703, \
|
|
0x00041000, \
|
|
0x00380700, \
|
|
0x00000000, \
|
|
}
|
|
|
|
|
|
/********************************************************/
|
|
/* CPUSaver micro code for the D102 B-step */
|
|
/********************************************************/
|
|
|
|
/* Version 2.0 */
|
|
|
|
/*
|
|
This version of CPUSaver is different from all others in
|
|
a different way. It combines the CPUSaver algorithm with
|
|
fixes for bugs in the B-step hardware (specifically, bugs
|
|
with Inline Receive).
|
|
Thus, when CPUSaver is disabled, this micro code image will
|
|
still need to be loaded. Before this happens, the hit addresses
|
|
for the CPUSaver algorithm must be set to 0x1FFFF. The hit
|
|
addresses for CPUSaver are (starting with 0, and remember that
|
|
|
|
*/
|
|
|
|
/* Parameter values for the D102 B-step */
|
|
#define D102_B_CPUSAVER_DWORD 91
|
|
#define D102_B_CPUSAVER_BUNDLE_MAX_DWORD 115
|
|
#define D102_B_CPUSAVER_MIN_SIZE_DWORD 70
|
|
|
|
|
|
#define D102_B_RCVBUNDLE_UCODE \
|
|
{\
|
|
0x006F0276, \
|
|
0x02BF0E93, \
|
|
0x1FFF0ED9, \
|
|
0x0D2508FA, \
|
|
0x04D21FFF, \
|
|
0x0EA10892, \
|
|
0x00300001, \
|
|
0x0140D871, \
|
|
0x00300008, \
|
|
0x00E00277, \
|
|
0x01406C57, \
|
|
0x00816073, \
|
|
0x008700FA, \
|
|
0x00E00070, \
|
|
0x00E00E94, \
|
|
0x00200004, \
|
|
0x01410000, \
|
|
0x014B6F6F, \
|
|
0x0030FFFF, \
|
|
0x01486F72, \
|
|
0x00E81F9B, \
|
|
0x00E00EA3, \
|
|
0x003C0040, \
|
|
0x00380920, \
|
|
0x00C02000, \
|
|
0x0150ED38, \
|
|
0x0150EE39, \
|
|
0x0150EF3A, \
|
|
0x003C0040, \
|
|
0x01506F0D, \
|
|
0x01600E72, \
|
|
0x00380AE0, \
|
|
0x00E002C0, \
|
|
0x00300001, \
|
|
0x014C0000, \
|
|
0x008404DC, \
|
|
0x014C6F72, \
|
|
0x00E01F9D, \
|
|
0x01406C51, \
|
|
0x0080DFC2, \
|
|
0x01406C52, \
|
|
0x00815FC2, \
|
|
0x01406C57, \
|
|
0x00917FD5, \
|
|
0x00E01FE6, \
|
|
0x00000000, \
|
|
0x01406C57, \
|
|
0x00919FAD, \
|
|
0x00038800, \
|
|
0x00300000, \
|
|
0x00E81FF2, \
|
|
0x014D6FC4, \
|
|
0x00E008FB, \
|
|
0x00000000, \
|
|
0x00822D30, \
|
|
0x01406C51, \
|
|
0x0080CD26, \
|
|
0x01406C52, \
|
|
0x00814D26, \
|
|
0x01406C57, \
|
|
0x00916D26, \
|
|
0x014C6FD7, \
|
|
0x00300000, \
|
|
0x00841FDB, \
|
|
0x00300001, \
|
|
0x0140D772, \
|
|
0x00E012B3, \
|
|
0x014C6F91, \
|
|
0x0150710B, \
|
|
0x01496F72, \
|
|
0x0030FF80, \
|
|
0x00940EDD, \
|
|
0x00102000, \
|
|
0x00E00EDA, \
|
|
0x01406C57, \
|
|
0x00917FFD, \
|
|
0x00001000, \
|
|
0x00E01FFD, \
|
|
0x00138800, \
|
|
0x00300001, \
|
|
0x00E81FF2, \
|
|
0x00202500, \
|
|
0x00E81F9B, \
|
|
0x01600EC5, \
|
|
0x00E00893, \
|
|
0x00000000, \
|
|
0x01406CD5, \
|
|
0x0091EEA3, \
|
|
0x00904EA3, \
|
|
0x00901F89, \
|
|
0x00E00EA3, \
|
|
0x00200600, \
|
|
0x0140D76F, \
|
|
0x00138400, \
|
|
0x01406FD8, \
|
|
0x0140D96F, \
|
|
0x00E01FE6, \
|
|
0x00038400, \
|
|
0x00102000, \
|
|
0x00971FE0, \
|
|
0x00101000, \
|
|
0x00050200, \
|
|
0x00E804D2, \
|
|
0x014C6FD8, \
|
|
0x00300001, \
|
|
0x00840D26, \
|
|
0x0140D872, \
|
|
0x00E00D26, \
|
|
0x014C6FD9, \
|
|
0x00300001, \
|
|
0x0140D972, \
|
|
0x00941FBD, \
|
|
0x00102000, \
|
|
0x00038400, \
|
|
0x014C6FD8, \
|
|
0x00300006, \
|
|
0x00840EDA, \
|
|
0x014F71D8, \
|
|
0x0140D872, \
|
|
0x00E00EDA, \
|
|
0x00340020, \
|
|
0x014C6FED, \
|
|
0x01603472, \
|
|
0x016035EE, \
|
|
0x016036EF, \
|
|
0x00300004, \
|
|
0x01611C71, \
|
|
0x00300014, \
|
|
0x00200A00, \
|
|
0x00E810B9, \
|
|
0x00600000, \
|
|
0x01496F50, \
|
|
0x00E004D3, \
|
|
0x00000000, \
|
|
}
|
|
|
|
|
|
|
|
|
|
/********************************************************/
|
|
/* TCO micro code for the D102 B-step */
|
|
/********************************************************/
|
|
|
|
/* Version 2.0 */
|
|
|
|
/*
|
|
This version is a fix to TCO bug. This version can be loaded instead
|
|
the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver"
|
|
|
|
*/
|
|
|
|
|
|
#define D102_B_TCO_UCODE \
|
|
{\
|
|
0x1FFF0ED3, \
|
|
0x02BF0E93, \
|
|
0x1FFF1FFF, \
|
|
0x1FFF08FA, \
|
|
0x1FFF1FFF, \
|
|
0x0EA10892, \
|
|
0x00906ED8, \
|
|
0x01406C55, \
|
|
0x00E00ED4, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E00E94, \
|
|
0x00200004, \
|
|
0x01410000, \
|
|
0x014B6F6F, \
|
|
0x0030FFFF, \
|
|
0x01486F72, \
|
|
0x00E81F9B, \
|
|
0x00E00EA3, \
|
|
0x003C0040, \
|
|
0x00380920, \
|
|
0x00C02000, \
|
|
0x0150ED38, \
|
|
0x0150EE39, \
|
|
0x0150EF3A, \
|
|
0x003C0040, \
|
|
0x01506F0D, \
|
|
0x01600E72, \
|
|
0x00380AE0, \
|
|
0x00E002C0, \
|
|
0x00300001, \
|
|
0x014C0000, \
|
|
0x008404DC, \
|
|
0x014C6F72, \
|
|
0x00E01F9D, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x01406C57, \
|
|
0x00919FAD, \
|
|
0x00038800, \
|
|
0x00300000, \
|
|
0x00E81FD5, \
|
|
0x014D6FC4, \
|
|
0x00E008FB, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00138800, \
|
|
0x00300001, \
|
|
0x00E81FD5, \
|
|
0x00202500, \
|
|
0x00E81F9B, \
|
|
0x01600EC5, \
|
|
0x00E00893, \
|
|
0x00000000, \
|
|
0x01406CD5, \
|
|
0x0091EEA3, \
|
|
0x00904EA3, \
|
|
0x00901F89, \
|
|
0x00E00EA3, \
|
|
0x00340020, \
|
|
0x014C6FED, \
|
|
0x01603472, \
|
|
0x016035EE, \
|
|
0x016036EF, \
|
|
0x00300004, \
|
|
0x01611C71, \
|
|
0x00300014, \
|
|
0x00200A00, \
|
|
0x00E810B9, \
|
|
0x00600000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
}
|
|
|
|
|
|
|
|
/********************************************************/
|
|
/* Micro code for the D102 C-step */
|
|
/********************************************************/
|
|
|
|
/* Parameter values for the D102 C-step */
|
|
#define D102_C_CPUSAVER_DWORD 46
|
|
#define D102_C_CPUSAVER_BUNDLE_MAX_DWORD 54
|
|
#define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */
|
|
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
// this uCode include the CPU Saver and the TCO work around
|
|
//for IP fregments.
|
|
#endif
|
|
#define D102_C_RCVBUNDLE_UCODE \
|
|
{ \
|
|
0x00700279, \
|
|
0x0E6104E2, \
|
|
0x02BF0CAE, \
|
|
0x1519150C, \
|
|
0x1FFF0E5B, \
|
|
0x1FFF1FFF, \
|
|
0x00E014D8, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014DC, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014F4, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014E0, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014E7, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00141000, \
|
|
0x015D6F0D, \
|
|
0x00E002C0, \
|
|
0x00000000, \
|
|
0x00200600, \
|
|
0x00E0150D, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00300006, \
|
|
0x00E0151A, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00906E65, \
|
|
0x00800E60, \
|
|
0x00E00E5D, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
}
|
|
|
|
/********************************************************/
|
|
/* Micro code for the D102 E-step */
|
|
/********************************************************/
|
|
|
|
/* Parameter values for the D102 E-step */
|
|
#define D102_E_CPUSAVER_DWORD 42
|
|
#define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54
|
|
#define D102_E_CPUSAVER_MIN_SIZE_DWORD 46
|
|
|
|
#define D102_E_RCVBUNDLE_UCODE \
|
|
{\
|
|
0x007D028F, \
|
|
0x0E4204F9, \
|
|
0x14ED0C85, \
|
|
0x14FA14E9, \
|
|
0x0EF70E36, \
|
|
0x1FFF1FFF, \
|
|
0x00E014B9, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014BD, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014D5, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014C1, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00E014C8, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00200600, \
|
|
0x00E014EE, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x0030FF80, \
|
|
0x00940E46, \
|
|
0x00038200, \
|
|
0x00102000, \
|
|
0x00E00E43, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00300006, \
|
|
0x00E014FB, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00906E41, \
|
|
0x00800E3C, \
|
|
0x00E00E39, \
|
|
0x00000000, \
|
|
0x00906EFD, \
|
|
0x00900EFD, \
|
|
0x00E00EF8, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
0x00000000, \
|
|
}
|