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b50569b71d
now takes a device_t to be the parent of the bus that is being created. Most SIMs have been updated with a reasonable argument, but a few exceptions just pass NULL for now. This argument isn't used yet and the newbus integration likely won't be ready until after 7.0-RELEASE.
161 lines
4.4 KiB
C
161 lines
4.4 KiB
C
/*-
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* Copyright (c) 1999 Luoqi Chen.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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struct aic_transinfo {
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u_int8_t period;
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u_int8_t offset;
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};
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struct aic_tinfo {
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u_int16_t lubusy;
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u_int8_t flags;
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u_int8_t scsirate;
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struct aic_transinfo current;
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struct aic_transinfo goal;
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struct aic_transinfo user;
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};
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#define TINFO_DISC_ENB 0x01
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#define TINFO_TAG_ENB 0x02
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#define TINFO_SDTR_NEGO 0x04
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#define TINFO_SDTR_SENT 0x08
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struct aic_scb {
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union ccb *ccb;
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u_int8_t flags;
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u_int8_t tag;
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u_int8_t target;
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u_int8_t lun;
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u_int8_t status;
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u_int8_t cmd_len;
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u_int8_t *cmd_ptr;
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u_int32_t data_len;
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u_int8_t *data_ptr;
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};
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#define ccb_scb_ptr spriv_ptr0
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#define ccb_aic_ptr spriv_ptr1
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#define SCB_ACTIVE 0x01
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#define SCB_DISCONNECTED 0x02
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#define SCB_DEVICE_RESET 0x04
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#define SCB_SENSE 0x08
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enum { AIC6260, AIC6360, AIC6370, GM82C700 };
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struct aic_softc {
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device_t dev;
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int unit;
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bus_space_tag_t tag;
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bus_space_handle_t bsh;
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bus_dma_tag_t dmat;
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struct cam_sim *sim;
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struct cam_path *path;
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TAILQ_HEAD(,ccb_hdr) pending_ccbs, nexus_ccbs;
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struct aic_scb *nexus;
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u_int32_t flags;
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u_int8_t initiator;
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u_int8_t state;
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u_int8_t target;
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u_int8_t lun;
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u_int8_t prev_phase;
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u_int8_t msg_outq;
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u_int8_t msg_sent;
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int msg_len;
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char msg_buf[8];
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struct aic_tinfo tinfo[8];
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struct aic_scb scbs[256];
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int min_period;
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int max_period;
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int chip_type;
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};
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#define AIC_DISC_ENABLE 0x01
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#define AIC_DMA_ENABLE 0x02
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#define AIC_PARITY_ENABLE 0x04
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#define AIC_DWIO_ENABLE 0x08
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#define AIC_RESOURCE_SHORTAGE 0x10
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#define AIC_DROP_MSGIN 0x20
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#define AIC_BUSFREE_OK 0x40
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#define AIC_FAST_ENABLE 0x80
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#define AIC_IDLE 0x00
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#define AIC_SELECTING 0x01
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#define AIC_RESELECTED 0x02
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#define AIC_RECONNECTING 0x03
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#define AIC_HASNEXUS 0x04
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#define AIC_MSG_IDENTIFY 0x01
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#define AIC_MSG_TAG_Q 0x02
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#define AIC_MSG_SDTR 0x04
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#define AIC_MSG_WDTR 0x08
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#define AIC_MSG_MSGBUF 0x80
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#define AIC_SYNC_PERIOD (200 / 4)
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#define AIC_FAST_SYNC_PERIOD (100 / 4)
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#define AIC_MIN_SYNC_PERIOD 112
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#define AIC_SYNC_OFFSET 8
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#define aic_inb(aic, port) \
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bus_space_read_1((aic)->tag, (aic)->bsh, (port))
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#define aic_outb(aic, port, value) \
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bus_space_write_1((aic)->tag, (aic)->bsh, (port), (value))
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#define aic_insb(aic, port, addr, count) \
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bus_space_read_multi_1((aic)->tag, (aic)->bsh, (port), (addr), (count))
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#define aic_outsb(aic, port, addr, count) \
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bus_space_write_multi_1((aic)->tag, (aic)->bsh, (port), (addr), (count))
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#define aic_insw(aic, port, addr, count) \
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bus_space_read_multi_2((aic)->tag, (aic)->bsh, (port), \
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(u_int16_t *)(addr), (count))
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#define aic_outsw(aic, port, addr, count) \
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bus_space_write_multi_2((aic)->tag, (aic)->bsh, (port), \
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(u_int16_t *)(addr), (count))
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#define aic_insl(aic, port, addr, count) \
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bus_space_read_multi_4((aic)->tag, (aic)->bsh, (port), \
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(u_int32_t *)(addr), (count))
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#define aic_outsl(aic, port, addr, count) \
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bus_space_write_multi_4((aic)->tag, (aic)->bsh, (port), \
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(u_int32_t *)(addr), (count))
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extern int aic_probe(struct aic_softc *);
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extern int aic_attach(struct aic_softc *);
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extern int aic_detach(struct aic_softc *);
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extern void aic_intr(void *);
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