mirror of
https://git.FreeBSD.org/src.git
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320 lines
8.4 KiB
C
320 lines
8.4 KiB
C
/*-
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/condvar.h>
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#include <sys/rman.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/xhci.h>
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#include <dev/usb/controller/xhcireg.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <arm/samsung/exynos/exynos5_common.h>
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#include "opt_platform.h"
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#define GSNPSID 0x20
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#define GSNPSID_MASK 0xffff0000
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#define REVISION_MASK 0xffff
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#define GCTL 0x10
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#define GCTL_PWRDNSCALE(n) ((n) << 19)
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#define GCTL_U2RSTECN (1 << 16)
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#define GCTL_CLK_BUS (0)
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#define GCTL_CLK_PIPE (1)
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#define GCTL_CLK_PIPEHALF (2)
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#define GCTL_CLK_M (3)
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#define GCTL_CLK_S (6)
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#define GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
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#define GCTL_PRTCAPDIR(n) ((n) << 12)
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#define GCTL_PRTCAP_HOST 1
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#define GCTL_PRTCAP_DEVICE 2
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#define GCTL_PRTCAP_OTG 3
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#define GCTL_CORESOFTRESET (1 << 11)
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#define GCTL_SCALEDOWN_MASK 3
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#define GCTL_SCALEDOWN_SHIFT 4
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#define GCTL_DISSCRAMBLE (1 << 3)
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#define GCTL_DSBLCLKGTNG (1 << 0)
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#define GHWPARAMS1 0x3c
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#define GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
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#define GHWPARAMS1_EN_PWROPT_NO 0
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#define GHWPARAMS1_EN_PWROPT_CLK 1
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#define GUSB2PHYCFG(n) (0x100 + (n * 0x04))
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#define GUSB2PHYCFG_PHYSOFTRST (1 << 31)
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#define GUSB2PHYCFG_SUSPHY (1 << 6)
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#define GUSB3PIPECTL(n) (0x1c0 + (n * 0x04))
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#define GUSB3PIPECTL_PHYSOFTRST (1 << 31)
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#define GUSB3PIPECTL_SUSPHY (1 << 17)
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/* Forward declarations */
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static device_attach_t exynos_xhci_attach;
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static device_detach_t exynos_xhci_detach;
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static device_probe_t exynos_xhci_probe;
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struct exynos_xhci_softc {
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device_t dev;
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struct xhci_softc base;
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struct resource *res[3];
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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};
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static struct resource_spec exynos_xhci_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_MEMORY, 1, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static device_method_t xhci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, exynos_xhci_probe),
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DEVMETHOD(device_attach, exynos_xhci_attach),
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DEVMETHOD(device_detach, exynos_xhci_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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/* kobj_class definition */
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static driver_t xhci_driver = {
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"xhci",
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xhci_methods,
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sizeof(struct xhci_softc)
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};
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static devclass_t xhci_devclass;
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DRIVER_MODULE(xhci, simplebus, xhci_driver, xhci_devclass, 0, 0);
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MODULE_DEPEND(xhci, usb, 1, 1, 1);
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/*
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* Public methods
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*/
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static int
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exynos_xhci_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_is_compatible(dev, "samsung,exynos5250-dwusb3") == 0)
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return (ENXIO);
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device_set_desc(dev, "Exynos USB 3.0 controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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dwc3_init(struct exynos_xhci_softc *esc)
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{
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int hwparams1;
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int rev;
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int reg;
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rev = READ4(esc, GSNPSID);
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if ((rev & GSNPSID_MASK) != 0x55330000) {
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printf("It is not DWC3 controller\n");
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return (-1);
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}
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/* Reset controller */
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WRITE4(esc, GCTL, GCTL_CORESOFTRESET);
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WRITE4(esc, GUSB3PIPECTL(0), GUSB3PIPECTL_PHYSOFTRST);
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WRITE4(esc, GUSB2PHYCFG(0), GUSB2PHYCFG_PHYSOFTRST);
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DELAY(100000);
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reg = READ4(esc, GUSB3PIPECTL(0));
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reg &= ~(GUSB3PIPECTL_PHYSOFTRST);
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WRITE4(esc, GUSB3PIPECTL(0), reg);
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reg = READ4(esc, GUSB2PHYCFG(0));
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reg &= ~(GUSB2PHYCFG_PHYSOFTRST);
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WRITE4(esc, GUSB2PHYCFG(0), reg);
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reg = READ4(esc, GCTL);
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reg &= ~GCTL_CORESOFTRESET;
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WRITE4(esc, GCTL, reg);
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hwparams1 = READ4(esc, GHWPARAMS1);
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reg = READ4(esc, GCTL);
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reg &= ~(GCTL_SCALEDOWN_MASK << GCTL_SCALEDOWN_SHIFT);
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reg &= ~(GCTL_DISSCRAMBLE);
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if (GHWPARAMS1_EN_PWROPT(hwparams1) == \
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GHWPARAMS1_EN_PWROPT_CLK)
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reg &= ~(GCTL_DSBLCLKGTNG);
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if ((rev & REVISION_MASK) < 0x190a)
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reg |= (GCTL_U2RSTECN);
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WRITE4(esc, GCTL, reg);
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/* Set host mode */
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reg = READ4(esc, GCTL);
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reg &= ~(GCTL_PRTCAPDIR(GCTL_PRTCAP_OTG));
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reg |= GCTL_PRTCAPDIR(GCTL_PRTCAP_HOST);
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WRITE4(esc, GCTL, reg);
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return (0);
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}
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static int
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exynos_xhci_attach(device_t dev)
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{
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struct exynos_xhci_softc *esc = device_get_softc(dev);
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bus_space_handle_t bsh;
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int err;
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esc->dev = dev;
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if (bus_alloc_resources(dev, exynos_xhci_spec, esc->res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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/* XHCI registers */
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esc->base.sc_io_tag = rman_get_bustag(esc->res[0]);
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bsh = rman_get_bushandle(esc->res[0]);
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esc->base.sc_io_size = rman_get_size(esc->res[0]);
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/* DWC3 ctrl registers */
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esc->bst = rman_get_bustag(esc->res[1]);
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esc->bsh = rman_get_bushandle(esc->res[1]);
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/*
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* Set handle to USB related registers subregion used by
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* generic XHCI driver.
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*/
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err = bus_space_subregion(esc->base.sc_io_tag, bsh, 0x0,
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esc->base.sc_io_size, &esc->base.sc_io_hdl);
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if (err != 0) {
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device_printf(dev, "Subregion failed\n");
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bus_release_resources(dev, exynos_xhci_spec, esc->res);
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return (ENXIO);
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}
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if (xhci_init(&esc->base, dev, 0)) {
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device_printf(dev, "Could not initialize softc\n");
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bus_release_resources(dev, exynos_xhci_spec, esc->res);
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return (ENXIO);
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}
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/* Setup interrupt handler */
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err = bus_setup_intr(dev, esc->res[2], INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)xhci_interrupt, &esc->base,
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&esc->base.sc_intr_hdl);
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if (err) {
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device_printf(dev, "Could not setup irq, %d\n", err);
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esc->base.sc_intr_hdl = NULL;
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goto error;
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}
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/* Add USB device */
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esc->base.sc_bus.bdev = device_add_child(dev, "usbus", -1);
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if (esc->base.sc_bus.bdev == NULL) {
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device_printf(dev, "Could not add USB device\n");
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goto error;
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}
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device_set_ivars(esc->base.sc_bus.bdev, &esc->base.sc_bus);
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strlcpy(esc->base.sc_vendor, "Samsung", sizeof(esc->base.sc_vendor));
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dwc3_init(esc);
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err = xhci_halt_controller(&esc->base);
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if (err == 0) {
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device_printf(dev, "Starting controller\n");
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err = xhci_start_controller(&esc->base);
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}
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if (err == 0) {
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device_printf(dev, "Controller started\n");
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err = device_probe_and_attach(esc->base.sc_bus.bdev);
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}
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if (err != 0)
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goto error;
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return (0);
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error:
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exynos_xhci_detach(dev);
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return (ENXIO);
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}
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static int
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exynos_xhci_detach(device_t dev)
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{
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struct exynos_xhci_softc *esc = device_get_softc(dev);
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device_t bdev;
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int err;
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if (esc->base.sc_bus.bdev != NULL) {
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bdev = esc->base.sc_bus.bdev;
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device_detach(bdev);
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device_delete_child(dev, bdev);
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}
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/* During module unload there are lots of children leftover */
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device_delete_children(dev);
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xhci_halt_controller(&esc->base);
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if (esc->res[2] && esc->base.sc_intr_hdl) {
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err = bus_teardown_intr(dev, esc->res[2],
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esc->base.sc_intr_hdl);
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if (err) {
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device_printf(dev, "Could not tear down IRQ,"
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" %d\n", err);
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return (err);
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}
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}
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bus_release_resources(dev, exynos_xhci_spec, esc->res);
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xhci_uninit(&esc->base);
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return (0);
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}
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