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52b3919d31
that is in included vm headers.
479 lines
11 KiB
C
479 lines
11 KiB
C
/*-
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* Copyright (c) 2000 Doug Rabson
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* Copyright (c) 2000 Ruslan Ermilov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_bus.h"
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#include "opt_pci.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <pci/agppriv.h>
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#include <pci/agpreg.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pageout.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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MALLOC_DECLARE(M_AGP);
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#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
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#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
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struct agp_i810_softc {
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struct agp_softc agp;
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_gatt *gatt;
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u_int32_t dcache_size;
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device_t bdev; /* bridge device */
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struct resource *regs; /* memory mapped GC registers */
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bus_space_tag_t bst; /* bus_space tag */
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bus_space_handle_t bsh; /* bus_space handle */
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};
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static const char*
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agp_i810_match(device_t dev)
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{
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if (pci_get_class(dev) != PCIC_DISPLAY
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|| pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
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return NULL;
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switch (pci_get_devid(dev)) {
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case 0x71218086:
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return ("Intel 82810 (i810 GMCH) SVGA controller");
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case 0x71238086:
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return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller");
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case 0x71258086:
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return ("Intel 82810E (i810E GMCH) SVGA controller");
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case 0x11328086:
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return ("Intel 82815 (i815 GMCH) SVGA controller");
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};
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return NULL;
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}
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/*
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* Find bridge device.
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*/
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static device_t
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agp_i810_find_bridge(device_t dev)
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{
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device_t *children, child;
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int nchildren, i;
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u_int32_t devid;
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/*
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* Calculate bridge device's ID.
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*/
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devid = pci_get_devid(dev);
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switch (devid) {
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case 0x71218086:
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case 0x71238086:
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case 0x71258086:
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devid -= 0x10000;
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break;
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case 0x11328086:
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devid = 0x11308086;
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break;
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};
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if (device_get_children(device_get_parent(dev), &children, &nchildren))
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return 0;
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for (i = 0; i < nchildren; i++) {
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child = children[i];
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if (pci_get_devid(child) == devid) {
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free(children, M_TEMP);
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return child;
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}
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}
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free(children, M_TEMP);
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return 0;
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}
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static int
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agp_i810_probe(device_t dev)
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{
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const char *desc;
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desc = agp_i810_match(dev);
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if (desc) {
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device_t bdev;
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u_int8_t smram;
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bdev = agp_i810_find_bridge(dev);
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if (!bdev) {
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if (bootverbose)
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printf("I810: can't find bridge device\n");
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return ENXIO;
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}
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smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
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if ((smram & AGP_I810_SMRAM_GMS)
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== AGP_I810_SMRAM_GMS_DISABLED) {
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if (bootverbose)
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printf("I810: disabled, not probing\n");
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return ENXIO;
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}
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device_verbose(dev);
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device_set_desc(dev, desc);
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return 0;
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}
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return ENXIO;
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}
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static int
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agp_i810_attach(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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struct agp_gatt *gatt;
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int error, rid;
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sc->bdev = agp_i810_find_bridge(dev);
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if (!sc->bdev)
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return ENOENT;
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error = agp_generic_attach(dev);
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if (error)
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return error;
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rid = AGP_I810_MMADR;
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sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
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0, ~0, 1, RF_ACTIVE);
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if (!sc->regs) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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sc->bst = rman_get_bustag(sc->regs);
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sc->bsh = rman_get_bushandle(sc->regs);
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sc->initial_aperture = AGP_GET_APERTURE(dev);
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if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
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sc->dcache_size = 4 * 1024 * 1024;
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else
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sc->dcache_size = 0;
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for (;;) {
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gatt = agp_alloc_gatt(dev);
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if (gatt)
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break;
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/*
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* Probably contigmalloc failure. Try reducing the
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* aperture so that the gatt size reduces.
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*/
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if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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}
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sc->gatt = gatt;
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/* Install the GATT. */
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WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
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/*
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* Make sure the chipset can see everything.
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*/
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agp_flush_cache();
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return 0;
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}
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static int
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agp_i810_detach(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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int error;
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error = agp_generic_detach(dev);
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if (error)
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return error;
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/* Clear the GATT base. */
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WRITE4(AGP_I810_PGTBL_CTL, 0);
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/* Put the aperture back the way it started. */
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AGP_SET_APERTURE(dev, sc->initial_aperture);
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agp_free_gatt(sc->gatt);
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bus_release_resource(dev, SYS_RES_MEMORY,
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AGP_I810_MMADR, sc->regs);
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return 0;
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}
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static u_int32_t
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agp_i810_get_aperture(device_t dev)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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u_int16_t miscc;
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miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
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if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
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return 32 * 1024 * 1024;
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else
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return 64 * 1024 * 1024;
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}
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static int
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agp_i810_set_aperture(device_t dev, u_int32_t aperture)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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u_int16_t miscc;
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/*
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* Double check for sanity.
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*/
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if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
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device_printf(dev, "bad aperture size %d\n", aperture);
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return EINVAL;
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}
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miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
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miscc &= ~AGP_I810_MISCC_WINSIZE;
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if (aperture == 32 * 1024 * 1024)
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miscc |= AGP_I810_MISCC_WINSIZE_32;
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else
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miscc |= AGP_I810_MISCC_WINSIZE_64;
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pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
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return 0;
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}
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static int
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agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
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return 0;
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}
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static int
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agp_i810_unbind_page(device_t dev, int offset)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
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return 0;
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}
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/*
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* Writing via memory mapped registers already flushes all TLBs.
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*/
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static void
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agp_i810_flush_tlb(device_t dev)
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{
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}
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static int
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agp_i810_enable(device_t dev, u_int32_t mode)
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{
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return 0;
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}
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static struct agp_memory *
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agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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struct agp_memory *mem;
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if ((size & (AGP_PAGE_SIZE - 1)) != 0)
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return 0;
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if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
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return 0;
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if (type == 1) {
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/*
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* Mapping local DRAM into GATT.
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*/
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if (size != sc->dcache_size)
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return 0;
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} else if (type == 2) {
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/*
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* Bogus mapping of a single page for the hardware cursor.
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*/
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if (size != AGP_PAGE_SIZE)
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return 0;
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}
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mem = malloc(sizeof *mem, M_AGP, M_WAITOK);
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mem->am_id = sc->agp.as_nextid++;
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mem->am_size = size;
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mem->am_type = type;
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if (type != 1)
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mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
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atop(round_page(size)));
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else
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mem->am_obj = 0;
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if (type == 2) {
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/*
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* Allocate and wire down the page now so that we can
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* get its physical address.
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*/
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vm_page_t m;
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m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_ZERO|VM_ALLOC_RETRY);
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vm_page_wire(m);
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mem->am_physical = VM_PAGE_TO_PHYS(m);
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vm_page_wakeup(m);
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} else {
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mem->am_physical = 0;
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}
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mem->am_offset = 0;
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mem->am_is_bound = 0;
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TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
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sc->agp.as_allocated += size;
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return mem;
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}
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static int
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agp_i810_free_memory(device_t dev, struct agp_memory *mem)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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if (mem->am_is_bound)
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return EBUSY;
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if (mem->am_type == 2) {
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/*
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* Unwire the page which we wired in alloc_memory.
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*/
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vm_page_t m = vm_page_lookup(mem->am_obj, 0);
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vm_page_unwire(m, 0);
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}
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sc->agp.as_allocated -= mem->am_size;
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TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
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if (mem->am_obj)
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vm_object_deallocate(mem->am_obj);
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free(mem, M_AGP);
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return 0;
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}
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static int
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agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
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vm_offset_t offset)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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vm_offset_t i;
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if (mem->am_type != 1)
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return agp_generic_bind_memory(dev, mem, offset);
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for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
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WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
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i | 3);
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}
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return 0;
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}
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static int
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agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
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{
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struct agp_i810_softc *sc = device_get_softc(dev);
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vm_offset_t i;
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if (mem->am_type != 1)
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return agp_generic_unbind_memory(dev, mem);
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for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
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WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
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return 0;
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}
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static device_method_t agp_i810_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, agp_i810_probe),
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DEVMETHOD(device_attach, agp_i810_attach),
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DEVMETHOD(device_detach, agp_i810_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* AGP interface */
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DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
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DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
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DEVMETHOD(agp_bind_page, agp_i810_bind_page),
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DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
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DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
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DEVMETHOD(agp_enable, agp_i810_enable),
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DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
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DEVMETHOD(agp_free_memory, agp_i810_free_memory),
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DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
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DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
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{ 0, 0 }
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};
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static driver_t agp_i810_driver = {
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"agp",
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agp_i810_methods,
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sizeof(struct agp_i810_softc),
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};
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static devclass_t agp_devclass;
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DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
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