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ac59515b98
Add missing support for specifying I/O control flags during core reset, and resolve a number of siba(4)-specific reset issues: - Add missing check for target reject flags in siba_is_hw_suspended(). - Remove incorrect wait on SIBA_TMH_BUSY when modifying any target state register; this should only be done when waiting for initiated transactions to clear. - Add missing wait on SIBA_IM_BY when asserting SIBA_IM_RJ. - Overwrite any previously set SIBA_TML_REJ flag when bringing the core out of reset. This fixes a lockup that occured when we brought up a core (after reboot) that had previously been placed into RESET by siba_bwn(4). Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D13039
235 lines
8.3 KiB
C
235 lines
8.3 KiB
C
/*-
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* Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
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* Copyright (c) 2017 The FreeBSD Foundation
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* All rights reserved.
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*
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* Portions of this software were developed by Landon Fuller
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _SIBA_SIBAVAR_H_
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#define _SIBA_SIBAVAR_H_
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include "siba.h"
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/*
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* Internal definitions shared by siba(4) driver implementations.
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*/
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struct siba_addrspace;
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struct siba_cfg_block;
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struct siba_devinfo;
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struct siba_core_id;
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struct siba_softc;
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int siba_probe(device_t dev);
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int siba_attach(device_t dev);
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int siba_detach(device_t dev);
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int siba_resume(device_t dev);
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int siba_suspend(device_t dev);
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u_int siba_get_intr_count(device_t dev, device_t child);
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int siba_get_intr_ivec(device_t dev, device_t child,
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u_int intr, u_int *ivec);
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uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor);
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struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow,
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u_int core_idx, int unit);
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int siba_add_children(device_t bus);
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struct siba_devinfo *siba_alloc_dinfo(device_t dev);
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int siba_init_dinfo(device_t dev,
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struct siba_devinfo *dinfo,
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const struct siba_core_id *core_id);
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void siba_free_dinfo(device_t dev, device_t child,
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struct siba_devinfo *dinfo);
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u_int siba_port_count(struct siba_core_id *core_id,
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bhnd_port_type port_type);
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bool siba_is_port_valid(struct siba_core_id *core_id,
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bhnd_port_type port_type, u_int port);
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u_int siba_port_region_count(
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struct siba_core_id *core_id,
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bhnd_port_type port_type, u_int port);
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int siba_cfg_index(struct siba_core_id *core_id,
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bhnd_port_type type, u_int port, u_int region,
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u_int *cfgidx);
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int siba_addrspace_index(struct siba_core_id *core_id,
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bhnd_port_type type, u_int port, u_int region,
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u_int *addridx);
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u_int siba_addrspace_device_port(u_int addrspace);
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u_int siba_addrspace_device_region(u_int addrspace);
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u_int siba_cfg_agent_port(u_int cfg);
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u_int siba_cfg_agent_region(u_int cfg);
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struct siba_addrspace *siba_find_addrspace(struct siba_devinfo *dinfo,
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bhnd_port_type type, u_int port, u_int region);
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struct siba_cfg_block *siba_find_cfg_block(struct siba_devinfo *dinfo,
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bhnd_port_type type, u_int port, u_int region);
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int siba_append_dinfo_region(struct siba_devinfo *dinfo,
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uint8_t sid, uint32_t base, uint32_t size,
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uint32_t bus_reserved);
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u_int siba_admatch_offset(uint8_t addrspace);
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int siba_parse_admatch(uint32_t am, uint32_t *addr,
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uint32_t *size);
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void siba_write_target_state(device_t dev,
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struct siba_devinfo *dinfo, bus_size_t reg,
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uint32_t value, uint32_t mask);
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int siba_wait_target_state(device_t dev,
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struct siba_devinfo *dinfo, bus_size_t reg,
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uint32_t value, uint32_t mask, u_int usec);
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/* Sonics configuration register blocks */
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#define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */
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#define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */
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#define SIBA_MAX_CFG SIBA_CFG_NUM_2_3 /**< maximum number of supported config
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register blocks */
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#define SIBA_CFG_RID_BASE 100 /**< base resource ID for SIBA_CFG* register allocations */
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#define SIBA_CFG_RID(_dinfo, _cfg) \
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(SIBA_CFG_RID_BASE + (_cfg) + \
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(_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG))
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/* Sonics/OCP address space mappings */
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#define SIBA_CORE_ADDRSPACE 0 /**< Address space mapping the primary
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device registers */
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#define SIBA_MAX_ADDRSPACE 4 /**< Maximum number of Sonics/OCP
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* address space mappings for a
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* single core. */
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/* bhnd(4) (port,region) representation of siba address space mappings */
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#define SIBA_MAX_PORT 2 /**< maximum number of advertised
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* bhnd(4) ports */
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/** siba(4) address space descriptor */
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struct siba_addrspace {
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uint32_t sa_base; /**< base address */
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uint32_t sa_size; /**< size */
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int sa_rid; /**< bus resource id */
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uint32_t sa_bus_reserved;/**< number of bytes at high end of
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* address space reserved for the bus */
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};
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/** siba(4) config block descriptor */
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struct siba_cfg_block {
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uint32_t cb_base; /**< base address */
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uint32_t cb_size; /**< size */
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int cb_rid; /**< bus resource id */
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};
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/** siba(4) backplane interrupt flag descriptor */
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struct siba_intr {
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u_int flag; /**< backplane flag # */
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bool mapped; /**< if an irq has been mapped */
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int rid; /**< bus resource id, or -1 if unassigned */
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rman_res_t irq; /**< the mapped bus irq, if any */
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};
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/**
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* siba(4) per-core identification info.
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*/
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struct siba_core_id {
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struct bhnd_core_info core_info; /**< standard bhnd(4) core info */
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uint16_t sonics_vendor; /**< OCP vendor identifier used to generate
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* the JEDEC-106 bhnd(4) vendor identifier. */
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uint8_t sonics_rev; /**< sonics backplane revision code */
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uint8_t num_addrspace; /**< number of address ranges mapped to
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this core. */
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uint8_t num_cfg_blocks; /**< number of Sonics configuration register
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blocks mapped to the core's enumeration
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space */
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};
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/**
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* siba(4) per-core PMU allocation state.
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*/
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typedef enum {
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SIBA_PMU_NONE, /**< If the core has not yet allocated PMU state */
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SIBA_PMU_BHND, /**< If standard bhnd(4) PMU support should be used */
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SIBA_PMU_PWRCTL, /**< If legacy PWRCTL PMU support should be used */
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} siba_pmu_state;
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/**
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* siba(4) per-device info
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*/
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struct siba_devinfo {
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struct resource_list resources; /**< per-core memory regions. */
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struct siba_core_id core_id; /**< core identification info */
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struct siba_addrspace addrspace[SIBA_MAX_ADDRSPACE]; /**< memory map descriptors */
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struct siba_cfg_block cfg[SIBA_MAX_CFG]; /**< config block descriptors */
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struct siba_intr intr; /**< interrupt flag descriptor, if any */
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bool intr_en; /**< if true, core has an assigned interrupt flag */
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struct bhnd_resource *cfg_res[SIBA_MAX_CFG]; /**< bus-mapped config block registers */
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int cfg_rid[SIBA_MAX_CFG]; /**< bus-mapped config block resource IDs */
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siba_pmu_state pmu_state; /**< per-core PMU state */
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union {
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void *bhnd_info; /**< if SIBA_PMU_BHND, bhnd(4)-managed per-core PMU info. */
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device_t pwrctl; /**< if SIBA_PMU_PWRCTL, legacy PWRCTL provider. */
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} pmu;
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};
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/** siba(4) per-instance state */
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struct siba_softc {
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struct bhnd_softc bhnd_sc; /**< bhnd state */
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device_t dev; /**< siba device */
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struct mtx mtx; /**< state mutex */
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};
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#define SIBA_LOCK_INIT(sc) \
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mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), NULL, MTX_DEF)
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#define SIBA_LOCK(sc) mtx_lock(&(sc)->mtx)
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#define SIBA_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
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#define SIBA_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what)
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#define SIBA_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
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#endif /* _SIBA_SIBAVAR_H_ */
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