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mirror of https://git.FreeBSD.org/src.git synced 2024-12-04 09:09:56 +00:00
freebsd/sys/conf/ldscript.arm64
Andrew Turner f1bc3750cf arm64: Use store-pair to zero the kernel bss
While this won't be noticed by most users the time to zero the bss
while using instruction tracing in the Arm FVP models (simulators) is
noticeable.

Reduce this time by using a store-pair instruction to double the size
of memory we zero on each iteration of the loop.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42733
2024-08-21 10:16:10 +00:00

148 lines
3.8 KiB
Plaintext

OUTPUT_ARCH(aarch64)
ENTRY(_start)
SEARCH_DIR(/usr/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = text_start; /* This is set using --defsym= on the command line. */
.vmm_vectors : { *(.vmm_vectors) }
.text :
{
*(.text)
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
} =0x9090
_etext = .;
PROVIDE (etext = .);
.fini : { *(.fini) } =0x9090
.rodata : { *(.rodata*) *(.gnu.linkonce.r*) }
.rodata1 : { *(.rodata1) }
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.note.gnu.build-id : {
PROVIDE (__build_id_start = .);
*(.note.gnu.build-id)
PROVIDE (__build_id_end = .);
}
.rel.text :
{ *(.rel.text) *(.rel.gnu.linkonce.t*) }
.rela.text :
{ *(.rela.text) *(.rela.gnu.linkonce.t*) }
.rel.data :
{ *(.rel.data) *(.rel.gnu.linkonce.d*) }
.rela.data :
{ *(.rela.data) *(.rela.gnu.linkonce.d*) }
.rel.rodata :
{ *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
.rela.rodata :
{ *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) } =0x9090
.plt : { *(.plt) }
. = ALIGN(4);
_extab_start = .;
PROVIDE(extab_start = .);
.ARM.extab : { *(.ARM.extab) }
_extab.end = .;
PROVIDE(extab_end = .);
_exidx_start = .;
PROVIDE(exidx_start = .);
.ARM.exidx : { *(.ARM.exidx) }
_exidx_end = .;
PROVIDE(exidx_end = .);
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */
. = ALIGN(0x1000) + (. & (0x1000 - 1)) ;
.data :
{
*(.data)
*(.gnu.linkonce.d*)
}
. = ALIGN(128);
.data.read_frequently :
{
*(SORT_BY_ALIGNMENT(.data.read_frequently))
}
.data.read_mostly :
{
*(.data.read_mostly)
}
. = ALIGN(128);
.data.exclusive_cache_line :
{
*(.data.exclusive_cache_line)
}
. = ALIGN(128);
.data1 : { *(.data1) }
. = ALIGN(32 / 8);
_start_ctors = .;
PROVIDE (start_ctors = .);
.ctors :
{
*(.ctors)
}
_stop_ctors = .;
PROVIDE (stop_ctors = .);
.dtors :
{
*(.dtors)
}
.got : { *(.got.plt) *(.got) }
.dynamic : { *(.dynamic) }
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(8);
.sdata : { *(.sdata) }
_edata = .;
PROVIDE (edata = .);
. = ALIGN(16);
__bss_start = .;
.sbss : { *(.sbss) *(.scommon) }
.bss :
{
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(16);
__bss_end = .;
/* A section for the initial page table, it doesn't need to be in the
kernel file, however unlike normal .bss entries should not be zeroed
out as we use it before the .bss section is cleared. */
*(.init_pagetable)
}
_end = . ;
PROVIDE (end = .);
/* Debug */
INCLUDE debuginfo.ldscript
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}