mirror of
https://git.FreeBSD.org/src.git
synced 2025-02-03 17:11:32 +00:00
baef67f10f
circuit generates too much jitter to be used directly as xmit clock. Don't miscount pending bytes in weird error conditions. Drop the rest of a packet if we run out of tx-md's. Trig the xmit-frame signal on rising edge, this fixed the one-bit-too-late position of the HDLC frames in E1 mode.