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a163d034fa
Approved by: trb
1240 lines
30 KiB
C
1240 lines
30 KiB
C
/*
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* Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* $FreeBSD$
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*
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* Device driver for Crystal Semiconductor CS8920 based ethernet
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* adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997
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*/
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/*
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#define CS_DEBUG
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/syslog.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_media.h>
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#include <net/ethernet.h>
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#include <net/bpf.h>
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#include <dev/cs/if_csvar.h>
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#include <dev/cs/if_csreg.h>
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#ifdef CS_USE_64K_DMA
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#define CS_DMA_BUFFER_SIZE 65536
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#else
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#define CS_DMA_BUFFER_SIZE 16384
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#endif
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static int cs_recv_delay = 570;
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SYSCTL_INT(_machdep, OID_AUTO, cs_recv_delay, CTLFLAG_RW, &cs_recv_delay, 0, "");
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static void cs_init (void *);
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static int cs_ioctl (struct ifnet *, u_long, caddr_t);
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static void cs_start (struct ifnet *);
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static void cs_stop (struct cs_softc *);
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static void cs_reset (struct cs_softc *);
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static void cs_watchdog (struct ifnet *);
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static int cs_mediachange (struct ifnet *);
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static void cs_mediastatus (struct ifnet *, struct ifmediareq *);
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static int cs_mediaset (struct cs_softc *, int);
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static void cs_write_mbufs(struct cs_softc*, struct mbuf*);
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static void cs_xmit_buf(struct cs_softc*);
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static int cs_get_packet(struct cs_softc*);
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static void cs_setmode(struct cs_softc*);
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static int get_eeprom_data(struct cs_softc *sc, int, int, int *);
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static int get_eeprom_cksum(int, int, int *);
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static int wait_eeprom_ready( struct cs_softc *);
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static void control_dc_dc( struct cs_softc *, int );
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static int send_test_pkt( struct cs_softc * );
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static int enable_tp(struct cs_softc *);
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static int enable_aui(struct cs_softc *);
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static int enable_bnc(struct cs_softc *);
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static int cs_duplex_auto(struct cs_softc *);
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devclass_t cs_devclass;
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static int
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get_eeprom_data( struct cs_softc *sc, int off, int len, int *buffer)
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{
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int i;
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#ifdef CS_DEBUG
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printf(CS_NAME":EEPROM data from %x for %x:\n", off,len);
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#endif
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for (i=0;i<len;i++) {
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if (wait_eeprom_ready(sc) < 0) return -1;
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/* Send command to EEPROM to read */
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cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD);
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if (wait_eeprom_ready(sc)<0)
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return (-1);
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buffer[i] = cs_readreg(sc, PP_EEData);
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#ifdef CS_DEBUG
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printf("%02x %02x ",(unsigned char)buffer[i],
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(unsigned char)buffer[i+1]);
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#endif
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}
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#ifdef CS_DEBUG
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printf("\n");
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#endif
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return (0);
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}
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static int
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get_eeprom_cksum(int off, int len, int *buffer)
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{
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int i,cksum=0;
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for (i=0;i<len;i++)
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cksum+=buffer[i];
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cksum &= 0xffff;
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if (cksum==0)
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return 0;
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return -1;
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}
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static int
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wait_eeprom_ready(struct cs_softc *sc)
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{
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DELAY ( 30000 ); /* XXX should we do some checks here ? */
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return 0;
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}
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static void
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control_dc_dc(struct cs_softc *sc, int on_not_off)
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{
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unsigned int self_control = HCB1_ENBL;
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if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off)
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self_control |= HCB1;
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else
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self_control &= ~HCB1;
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cs_writereg(sc, PP_SelfCTL, self_control);
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DELAY( 500000 );
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}
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static int
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cs_duplex_auto(struct cs_softc *sc)
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{
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int i, error=0;
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cs_writereg(sc, PP_AutoNegCTL,
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RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE);
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for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) {
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if (i > 40000) {
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if_printf(&sc->arpcom.ac_if,
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"full/half duplex auto negotiation timeout\n");
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error = ETIMEDOUT;
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break;
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}
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DELAY(1000);
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}
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DELAY( 1000000 );
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return error;
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}
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static int
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enable_tp(struct cs_softc *sc)
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{
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cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY);
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control_dc_dc(sc, 0);
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DELAY( 150000 );
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if ((cs_readreg(sc, PP_LineST) & LINK_OK)==0) {
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if_printf(&sc->arpcom.ac_if, "failed to enable TP\n");
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return EINVAL;
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}
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return 0;
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}
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/*
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* XXX This was rewritten from Linux driver without any tests.
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*/
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static int
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send_test_pkt(struct cs_softc *sc)
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{
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char test_packet[] = { 0,0,0,0,0,0, 0,0,0,0,0,0,
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0, 46, /* A 46 in network order */
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0, 0, /* DSAP=0 & SSAP=0 fields */
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0xf3, 0 /* Control (Test Req + P bit set) */ };
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int i;
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u_char ether_address_backup[ETHER_ADDR_LEN];
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for (i = 0; i < ETHER_ADDR_LEN; i++) {
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ether_address_backup[i] = sc->arpcom.ac_enaddr[i];
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}
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cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_TX_ON);
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bcopy(test_packet, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
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bcopy(test_packet+ETHER_ADDR_LEN,
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sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
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cs_outw(sc, TX_CMD_PORT, sc->send_cmd);
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cs_outw(sc, TX_LEN_PORT, sizeof(test_packet));
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/* Wait for chip to allocate memory */
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DELAY(50000);
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if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) {
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for (i = 0; i < ETHER_ADDR_LEN; i++) {
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sc->arpcom.ac_enaddr[i] = ether_address_backup[i];
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}
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return 0;
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}
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outsw(sc->nic_addr + TX_FRAME_PORT, test_packet, sizeof(test_packet));
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DELAY(30000);
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if ((cs_readreg(sc, PP_TxEvent) & TX_SEND_OK_BITS) == TX_OK) {
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for (i = 0; i < ETHER_ADDR_LEN; i++) {
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sc->arpcom.ac_enaddr[i] = ether_address_backup[i];
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}
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return 1;
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}
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for (i = 0; i < ETHER_ADDR_LEN; i++) {
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sc->arpcom.ac_enaddr[i] = ether_address_backup[i];
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}
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return 0;
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}
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/*
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* XXX This was rewritten from Linux driver without any tests.
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*/
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static int
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enable_aui(struct cs_softc *sc)
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{
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control_dc_dc(sc, 0);
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cs_writereg(sc, PP_LineCTL,
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(sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
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if (!send_test_pkt(sc)) {
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if_printf(&sc->arpcom.ac_if, "failed to enable AUI\n");
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return EINVAL;
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}
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return 0;
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}
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/*
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* XXX This was rewritten from Linux driver without any tests.
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*/
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static int
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enable_bnc(struct cs_softc *sc)
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{
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control_dc_dc(sc, 1);
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cs_writereg(sc, PP_LineCTL,
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(sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
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if (!send_test_pkt(sc)) {
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if_printf(&sc->arpcom.ac_if, "failed to enable BNC\n");
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return EINVAL;
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}
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return 0;
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}
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int
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cs_cs89x0_probe(device_t dev)
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{
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int i;
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int error;
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u_long irq, junk;
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struct cs_softc *sc = device_get_softc(dev);
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unsigned rev_type = 0;
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u_int16_t id;
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char chip_revision;
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int eeprom_buff[CHKSUM_LEN];
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int chip_type, pp_isaint, pp_isadma;
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error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS);
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if (error)
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return (error);
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sc->nic_addr = rman_get_start(sc->port_res);
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if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) {
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/* Chip not detected. Let's try to reset it */
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if (bootverbose)
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device_printf(dev, "trying to reset the chip.\n");
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cs_outw(sc, ADD_PORT, PP_SelfCTL);
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i = cs_inw(sc, DATA_PORT);
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cs_outw(sc, ADD_PORT, PP_SelfCTL);
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cs_outw(sc, DATA_PORT, i | POWER_ON_RESET);
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if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG)
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return (ENXIO);
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}
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for (i = 0; i < 10000; i++) {
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id = cs_readreg(sc, PP_ChipID);
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if (id == CHIP_EISA_ID_SIG)
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break;
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}
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if (i == 10000)
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return (ENXIO);
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rev_type = cs_readreg(sc, PRODUCT_ID_ADD);
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chip_type = rev_type & ~REVISON_BITS;
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chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
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sc->chip_type = chip_type;
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if(chip_type==CS8900) {
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pp_isaint = PP_CS8900_ISAINT;
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pp_isadma = PP_CS8900_ISADMA;
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sc->send_cmd = TX_CS8900_AFTER_ALL;
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} else {
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pp_isaint = PP_CS8920_ISAINT;
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pp_isadma = PP_CS8920_ISADMA;
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sc->send_cmd = TX_CS8920_AFTER_ALL;
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}
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/*
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* Clear some fields so that fail of EEPROM will left them clean
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*/
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sc->auto_neg_cnf = 0;
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sc->adapter_cnf = 0;
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sc->isa_config = 0;
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/*
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* If no interrupt specified (or "?"), use what the board tells us.
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*/
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error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
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/*
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* Get data from EEPROM
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*/
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if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) {
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device_printf(dev, "No EEPROM, assuming defaults.\n");
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} else {
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if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
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device_printf(dev, "EEPROM read failed, "
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"assuming defaults.\n");
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} else {
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if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
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device_printf(dev, "EEPROM cheksum bad, "
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"assuming defaults.\n");
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} else {
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sc->auto_neg_cnf =
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eeprom_buff[AUTO_NEG_CNF_OFFSET/2];
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sc->adapter_cnf =
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eeprom_buff[ADAPTER_CNF_OFFSET/2];
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sc->isa_config =
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eeprom_buff[ISA_CNF_OFFSET/2];
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for (i=0; i<ETHER_ADDR_LEN/2; i++) {
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sc->arpcom.ac_enaddr[i*2]=
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eeprom_buff[i];
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sc->arpcom.ac_enaddr[i*2+1]=
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eeprom_buff[i] >> 8;
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}
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/*
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* If no interrupt specified (or "?"),
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* use what the board tells us.
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*/
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if (error) {
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irq = sc->isa_config & INT_NO_MASK;
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if (chip_type==CS8900) {
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switch(irq) {
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case 0:
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irq=10;
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error=0;
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break;
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case 1:
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irq=11;
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error=0;
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break;
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case 2:
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irq=12;
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error=0;
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break;
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case 3:
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irq=5;
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error=0;
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break;
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default:
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device_printf(dev, "invalid irq in EEPROM.\n");
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error=EINVAL;
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}
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} else {
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if (irq>CS8920_NO_INTS) {
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device_printf(dev, "invalid irq in EEPROM.\n");
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error=EINVAL;
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} else {
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error=0;
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}
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}
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if (!error)
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bus_set_resource(dev, SYS_RES_IRQ, 0,
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irq, 1);
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}
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}
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}
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}
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if (!error) {
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if (chip_type == CS8900) {
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switch(irq) {
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case 5:
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irq = 3;
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break;
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case 10:
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irq = 0;
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break;
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case 11:
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irq = 1;
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break;
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case 12:
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irq = 2;
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break;
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default:
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error=EINVAL;
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}
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} else {
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if (irq > CS8920_NO_INTS) {
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error = EINVAL;
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}
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}
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}
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if (!error) {
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cs_writereg(sc, pp_isaint, irq);
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} else {
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device_printf(dev, "Unknown or invalid irq\n");
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return (ENXIO);
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}
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/*
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* Temporary disabled
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*
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if (drq>0)
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cs_writereg(sc, pp_isadma, drq);
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else {
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device_printf(dev, "incorrect drq\n",);
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return 0;
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}
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*/
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if (bootverbose)
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device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n",
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chip_type==CS8900 ? '0' : '2',
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chip_type==CS8920M ? "M" : "",
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chip_revision,
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(sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "",
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(sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "",
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(sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : "");
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if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) &&
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(sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH))
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sc->line_ctl = LOW_RX_SQUELCH;
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else
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sc->line_ctl = 0;
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return 0;
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}
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/*
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* Allocate a port resource with the given resource id.
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*/
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int cs_alloc_port(device_t dev, int rid, int size)
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{
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struct cs_softc *sc = device_get_softc(dev);
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struct resource *res;
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res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0ul, ~0ul, size, RF_ACTIVE);
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if (res) {
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sc->port_rid = rid;
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sc->port_res = res;
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sc->port_used = size;
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return (0);
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} else {
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return (ENOENT);
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}
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}
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|
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/*
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* Allocate a memory resource with the given resource id.
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*/
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int cs_alloc_memory(device_t dev, int rid, int size)
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{
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struct cs_softc *sc = device_get_softc(dev);
|
|
struct resource *res;
|
|
|
|
res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
|
|
0ul, ~0ul, size, RF_ACTIVE);
|
|
if (res) {
|
|
sc->mem_rid = rid;
|
|
sc->mem_res = res;
|
|
sc->mem_used = size;
|
|
return (0);
|
|
} else {
|
|
return (ENOENT);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Allocate an irq resource with the given resource id.
|
|
*/
|
|
int cs_alloc_irq(device_t dev, int rid, int flags)
|
|
{
|
|
struct cs_softc *sc = device_get_softc(dev);
|
|
struct resource *res;
|
|
|
|
res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
|
|
0ul, ~0ul, 1, (RF_ACTIVE | flags));
|
|
if (res) {
|
|
sc->irq_rid = rid;
|
|
sc->irq_res = res;
|
|
return (0);
|
|
} else {
|
|
return (ENOENT);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Release all resources
|
|
*/
|
|
void cs_release_resources(device_t dev)
|
|
{
|
|
struct cs_softc *sc = device_get_softc(dev);
|
|
|
|
if (sc->port_res) {
|
|
bus_release_resource(dev, SYS_RES_IOPORT,
|
|
sc->port_rid, sc->port_res);
|
|
sc->port_res = 0;
|
|
}
|
|
if (sc->mem_res) {
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
|
sc->mem_rid, sc->mem_res);
|
|
sc->mem_res = 0;
|
|
}
|
|
if (sc->irq_res) {
|
|
bus_release_resource(dev, SYS_RES_IRQ,
|
|
sc->irq_rid, sc->irq_res);
|
|
sc->irq_res = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Install the interface into kernel networking data structures
|
|
*/
|
|
int
|
|
cs_attach(struct cs_softc *sc, int unit, int flags)
|
|
{
|
|
int media=0;
|
|
struct ifnet *ifp = &(sc->arpcom.ac_if);
|
|
|
|
cs_stop( sc );
|
|
|
|
if (!ifp->if_name) {
|
|
ifp->if_softc=sc;
|
|
ifp->if_unit=unit;
|
|
ifp->if_name="cs";
|
|
ifp->if_output=ether_output;
|
|
ifp->if_start=cs_start;
|
|
ifp->if_ioctl=cs_ioctl;
|
|
ifp->if_watchdog=cs_watchdog;
|
|
ifp->if_init=cs_init;
|
|
ifp->if_snd.ifq_maxlen= IFQ_MAXLEN;
|
|
/*
|
|
* MIB DATA
|
|
*/
|
|
/*
|
|
ifp->if_linkmib=&sc->mibdata;
|
|
ifp->if_linkmiblen=sizeof sc->mibdata;
|
|
*/
|
|
|
|
ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST );
|
|
|
|
/*
|
|
* this code still in progress (DMA support)
|
|
*
|
|
|
|
sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT);
|
|
if (sc->recv_ring == NULL) {
|
|
log(LOG_ERR,CS_NAME
|
|
"%d: Couldn't allocate memory for NIC\n", unit);
|
|
return(0);
|
|
}
|
|
if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF))
|
|
< (128*1024-CS_DMA_BUFFER_SIZE))
|
|
sc->recv_ring+=16*1024;
|
|
|
|
*/
|
|
|
|
sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT);
|
|
if (sc->buffer == NULL) {
|
|
if_printf(ifp, "Couldn't allocate memory for NIC\n");
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Initialize the media structures.
|
|
*/
|
|
ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus);
|
|
|
|
if (sc->adapter_cnf & A_CNF_10B_T) {
|
|
ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL);
|
|
if (sc->chip_type != CS8900) {
|
|
ifmedia_add(&sc->media,
|
|
IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
|
|
ifmedia_add(&sc->media,
|
|
IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
|
|
}
|
|
}
|
|
|
|
if (sc->adapter_cnf & A_CNF_10B_2)
|
|
ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL);
|
|
|
|
if (sc->adapter_cnf & A_CNF_AUI)
|
|
ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL);
|
|
|
|
if (sc->adapter_cnf & A_CNF_MEDIA)
|
|
ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL);
|
|
|
|
/* Set default media from EEPROM */
|
|
switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) {
|
|
case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break;
|
|
case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break;
|
|
case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break;
|
|
case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break;
|
|
default: if_printf(ifp, "adapter has no media\n");
|
|
}
|
|
ifmedia_set(&sc->media, media);
|
|
cs_mediaset(sc, media);
|
|
|
|
ether_ifattach(ifp, sc->arpcom.ac_enaddr);
|
|
}
|
|
|
|
if (bootverbose)
|
|
if_printf(ifp, "ethernet address %6D\n",
|
|
sc->arpcom.ac_enaddr, ":");
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Initialize the board
|
|
*/
|
|
static void
|
|
cs_init(void *xsc)
|
|
{
|
|
struct cs_softc *sc=(struct cs_softc *)xsc;
|
|
struct ifnet *ifp = &sc->arpcom.ac_if;
|
|
int i, s, rx_cfg;
|
|
|
|
/* address not known */
|
|
if (TAILQ_EMPTY(&ifp->if_addrhead)) /* unlikely? XXX */
|
|
return;
|
|
|
|
/*
|
|
* reset whatchdog timer
|
|
*/
|
|
ifp->if_timer=0;
|
|
sc->buf_len = 0;
|
|
|
|
s=splimp();
|
|
|
|
/*
|
|
* Hardware initialization of cs
|
|
*/
|
|
|
|
/* Enable receiver and transmitter */
|
|
cs_writereg(sc, PP_LineCTL,
|
|
cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);
|
|
|
|
/* Configure the receiver mode */
|
|
cs_setmode(sc);
|
|
|
|
/*
|
|
* This defines what type of frames will cause interrupts
|
|
* Bad frames should generate interrupts so that the driver
|
|
* could track statistics of discarded packets
|
|
*/
|
|
rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL |
|
|
RX_EXTRA_DATA_ENBL;
|
|
if (sc->isa_config & STREAM_TRANSFER)
|
|
rx_cfg |= RX_STREAM_ENBL;
|
|
cs_writereg(sc, PP_RxCFG, rx_cfg);
|
|
cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL |
|
|
TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL |
|
|
TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL);
|
|
cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL |
|
|
RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL |
|
|
TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/);
|
|
|
|
/* Write MAC address into IA filter */
|
|
for (i=0; i<ETHER_ADDR_LEN/2; i++)
|
|
cs_writereg(sc, PP_IA + i * 2,
|
|
sc->arpcom.ac_enaddr[i * 2] |
|
|
(sc->arpcom.ac_enaddr[i * 2 + 1] << 8) );
|
|
|
|
/*
|
|
* Now enable everything
|
|
*/
|
|
/*
|
|
#ifdef CS_USE_64K_DMA
|
|
cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K);
|
|
#else
|
|
cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
|
|
#endif
|
|
*/
|
|
cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
|
|
|
|
/*
|
|
* Set running and clear output active flags
|
|
*/
|
|
sc->arpcom.ac_if.if_flags |= IFF_RUNNING;
|
|
sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
|
|
|
|
/*
|
|
* Start sending process
|
|
*/
|
|
cs_start(ifp);
|
|
|
|
(void) splx(s);
|
|
}
|
|
|
|
/*
|
|
* Get the packet from the board and send it to the upper layer.
|
|
*/
|
|
static int
|
|
cs_get_packet(struct cs_softc *sc)
|
|
{
|
|
struct ifnet *ifp = &(sc->arpcom.ac_if);
|
|
int iobase = sc->nic_addr, status, length;
|
|
struct ether_header *eh;
|
|
struct mbuf *m;
|
|
|
|
#ifdef CS_DEBUG
|
|
int i;
|
|
#endif
|
|
|
|
status = cs_inw(sc, RX_FRAME_PORT);
|
|
length = cs_inw(sc, RX_FRAME_PORT);
|
|
|
|
#ifdef CS_DEBUG
|
|
if_printf(ifp, "rcvd: stat %x, len %d\n",
|
|
status, length);
|
|
#endif
|
|
|
|
if (!(status & RX_OK)) {
|
|
#ifdef CS_DEBUG
|
|
if_printf(ifp, "bad pkt stat %x\n", status);
|
|
#endif
|
|
ifp->if_ierrors++;
|
|
return -1;
|
|
}
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (m==NULL)
|
|
return -1;
|
|
|
|
if (length > MHLEN) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if (!(m->m_flags & M_EXT)) {
|
|
m_freem(m);
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
/* Initialize packet's header info */
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_pkthdr.len = length;
|
|
m->m_len = length;
|
|
|
|
/* Get the data */
|
|
insw(iobase + RX_FRAME_PORT, m->m_data, (length+1)>>1);
|
|
|
|
eh = mtod(m, struct ether_header *);
|
|
|
|
#ifdef CS_DEBUG
|
|
for (i=0;i<length;i++)
|
|
printf(" %02x",(unsigned char)*((char *)(m->m_data+i)));
|
|
printf( "\n" );
|
|
#endif
|
|
|
|
if (status & (RX_IA | RX_BROADCAST) ||
|
|
(ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) {
|
|
/* Feed the packet to the upper layer */
|
|
(*ifp->if_input)(ifp, m);
|
|
|
|
ifp->if_ipackets++;
|
|
|
|
if (length==ETHER_MAX_LEN-ETHER_CRC_LEN)
|
|
DELAY( cs_recv_delay );
|
|
} else {
|
|
m_freem(m);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Handle interrupts
|
|
*/
|
|
void
|
|
csintr(void *arg)
|
|
{
|
|
struct cs_softc *sc = (struct cs_softc*) arg;
|
|
struct ifnet *ifp = &(sc->arpcom.ac_if);
|
|
int status;
|
|
|
|
#ifdef CS_DEBUG
|
|
if_printf(ifp, "Interrupt.\n");
|
|
#endif
|
|
|
|
while ((status=cs_inw(sc, ISQ_PORT))) {
|
|
|
|
#ifdef CS_DEBUG
|
|
if_printf(ifp, "from ISQ: %04x\n", status);
|
|
#endif
|
|
|
|
switch (status & ISQ_EVENT_MASK) {
|
|
case ISQ_RECEIVER_EVENT:
|
|
cs_get_packet(sc);
|
|
break;
|
|
|
|
case ISQ_TRANSMITTER_EVENT:
|
|
if (status & TX_OK)
|
|
ifp->if_opackets++;
|
|
else
|
|
ifp->if_oerrors++;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
break;
|
|
|
|
case ISQ_BUFFER_EVENT:
|
|
if (status & READY_FOR_TX) {
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
}
|
|
|
|
if (status & TX_UNDERRUN) {
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
ifp->if_oerrors++;
|
|
}
|
|
break;
|
|
|
|
case ISQ_RX_MISS_EVENT:
|
|
ifp->if_ierrors+=(status>>6);
|
|
break;
|
|
|
|
case ISQ_TX_COL_EVENT:
|
|
ifp->if_collisions+=(status>>6);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!(ifp->if_flags & IFF_OACTIVE)) {
|
|
cs_start(ifp);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Save the data in buffer
|
|
*/
|
|
|
|
static void
|
|
cs_write_mbufs( struct cs_softc *sc, struct mbuf *m )
|
|
{
|
|
int len;
|
|
struct mbuf *mp;
|
|
unsigned char *data, *buf;
|
|
|
|
for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) {
|
|
len = mp->m_len;
|
|
|
|
/*
|
|
* Ignore empty parts
|
|
*/
|
|
if (!len)
|
|
continue;
|
|
|
|
/*
|
|
* Find actual data address
|
|
*/
|
|
data = mtod(mp, caddr_t);
|
|
|
|
bcopy((caddr_t) data, (caddr_t) buf, len);
|
|
buf += len;
|
|
sc->buf_len += len;
|
|
}
|
|
}
|
|
|
|
|
|
static void
|
|
cs_xmit_buf( struct cs_softc *sc )
|
|
{
|
|
outsw(sc->nic_addr+TX_FRAME_PORT, sc->buffer, (sc->buf_len+1)>>1);
|
|
sc->buf_len = 0;
|
|
}
|
|
|
|
static void
|
|
cs_start(struct ifnet *ifp)
|
|
{
|
|
int s, length;
|
|
struct mbuf *m, *mp;
|
|
struct cs_softc *sc = ifp->if_softc;
|
|
|
|
s = splimp();
|
|
|
|
for (;;) {
|
|
if (sc->buf_len)
|
|
length = sc->buf_len;
|
|
else {
|
|
IF_DEQUEUE( &ifp->if_snd, m );
|
|
|
|
if (m==NULL) {
|
|
(void) splx(s);
|
|
return;
|
|
}
|
|
|
|
for (length=0, mp=m; mp != NULL; mp=mp->m_next)
|
|
length += mp->m_len;
|
|
|
|
/* Skip zero-length packets */
|
|
if (length == 0) {
|
|
m_freem(m);
|
|
continue;
|
|
}
|
|
|
|
cs_write_mbufs(sc, m);
|
|
|
|
BPF_MTAP(ifp, m);
|
|
|
|
m_freem(m);
|
|
}
|
|
|
|
/*
|
|
* Issue a SEND command
|
|
*/
|
|
cs_outw(sc, TX_CMD_PORT, sc->send_cmd);
|
|
cs_outw(sc, TX_LEN_PORT, length );
|
|
|
|
/*
|
|
* If there's no free space in the buffer then leave
|
|
* this packet for the next time: indicate output active
|
|
* and return.
|
|
*/
|
|
if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) {
|
|
ifp->if_timer = sc->buf_len;
|
|
(void) splx(s);
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
return;
|
|
}
|
|
|
|
cs_xmit_buf(sc);
|
|
|
|
/*
|
|
* Set the watchdog timer in case we never hear
|
|
* from board again. (I don't know about correct
|
|
* value for this timeout)
|
|
*/
|
|
ifp->if_timer = length;
|
|
|
|
(void) splx(s);
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
return;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Stop everything on the interface
|
|
*/
|
|
static void
|
|
cs_stop(struct cs_softc *sc)
|
|
{
|
|
int s = splimp();
|
|
|
|
cs_writereg(sc, PP_RxCFG, 0);
|
|
cs_writereg(sc, PP_TxCFG, 0);
|
|
cs_writereg(sc, PP_BufCFG, 0);
|
|
cs_writereg(sc, PP_BusCTL, 0);
|
|
|
|
sc->arpcom.ac_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
|
|
sc->arpcom.ac_if.if_timer = 0;
|
|
|
|
(void) splx(s);
|
|
}
|
|
|
|
/*
|
|
* Reset the interface
|
|
*/
|
|
static void
|
|
cs_reset(struct cs_softc *sc)
|
|
{
|
|
cs_stop(sc);
|
|
cs_init(sc);
|
|
}
|
|
|
|
static void
|
|
cs_setmode(struct cs_softc *sc)
|
|
{
|
|
struct ifnet *ifp = &(sc->arpcom.ac_if);
|
|
int rx_ctl;
|
|
|
|
/* Stop the receiver while changing filters */
|
|
cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON);
|
|
|
|
if (ifp->if_flags & IFF_PROMISC) {
|
|
/* Turn on promiscuous mode. */
|
|
rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT;
|
|
} else {
|
|
if (ifp->if_flags & IFF_MULTICAST) {
|
|
/* Allow receiving frames with multicast addresses */
|
|
rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
|
|
RX_OK_ACCEPT | RX_MULTCAST_ACCEPT;
|
|
/*
|
|
* Here the reconfiguration of chip's multicast
|
|
* filters should be done but I've no idea about
|
|
* hash transformation in this chip. If you can
|
|
* add this code or describe me the transformation
|
|
* I'd be very glad.
|
|
*/
|
|
} else {
|
|
/*
|
|
* Receive only good frames addressed for us and
|
|
* good broadcasts.
|
|
*/
|
|
rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
|
|
RX_OK_ACCEPT;
|
|
}
|
|
}
|
|
|
|
/* Set up the filter */
|
|
cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl);
|
|
|
|
/* Turn on receiver */
|
|
cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON);
|
|
}
|
|
|
|
static int
|
|
cs_ioctl(register struct ifnet *ifp, u_long command, caddr_t data)
|
|
{
|
|
struct cs_softc *sc=ifp->if_softc;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s,error=0;
|
|
|
|
#ifdef CS_DEBUG
|
|
if_printf(ifp, "ioctl(%lx)\n", command);
|
|
#endif
|
|
|
|
s=splimp();
|
|
|
|
switch (command) {
|
|
case SIOCSIFFLAGS:
|
|
/*
|
|
* Switch interface state between "running" and
|
|
* "stopped", reflecting the UP flag.
|
|
*/
|
|
if (sc->arpcom.ac_if.if_flags & IFF_UP) {
|
|
if ((sc->arpcom.ac_if.if_flags & IFF_RUNNING)==0) {
|
|
cs_init(sc);
|
|
}
|
|
} else {
|
|
if ((sc->arpcom.ac_if.if_flags & IFF_RUNNING)!=0) {
|
|
cs_stop(sc);
|
|
}
|
|
}
|
|
/*
|
|
* Promiscuous and/or multicast flags may have changed,
|
|
* so reprogram the multicast filter and/or receive mode.
|
|
*
|
|
* See note about multicasts in cs_setmode
|
|
*/
|
|
cs_setmode(sc);
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*
|
|
* See note about multicasts in cs_setmode
|
|
*/
|
|
cs_setmode(sc);
|
|
error = 0;
|
|
break;
|
|
|
|
case SIOCSIFMEDIA:
|
|
case SIOCGIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
|
|
break;
|
|
|
|
default:
|
|
ether_ioctl(ifp, command, data);
|
|
break;
|
|
}
|
|
|
|
(void) splx(s);
|
|
return error;
|
|
}
|
|
|
|
/*
|
|
* Device timeout/watchdog routine. Entered if the device neglects to
|
|
* generate an interrupt after a transmit has been started on it.
|
|
*/
|
|
static void
|
|
cs_watchdog(struct ifnet *ifp)
|
|
{
|
|
struct cs_softc *sc = ifp->if_softc;
|
|
|
|
ifp->if_oerrors++;
|
|
log(LOG_ERR, CS_NAME"%d: device timeout\n", ifp->if_unit);
|
|
|
|
/* Reset the interface */
|
|
if (ifp->if_flags & IFF_UP)
|
|
cs_reset(sc);
|
|
else
|
|
cs_stop(sc);
|
|
}
|
|
|
|
static int
|
|
cs_mediachange(struct ifnet *ifp)
|
|
{
|
|
struct cs_softc *sc = ifp->if_softc;
|
|
struct ifmedia *ifm = &sc->media;
|
|
|
|
if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
|
|
return EINVAL;
|
|
|
|
return cs_mediaset(sc, ifm->ifm_media);
|
|
}
|
|
|
|
static void
|
|
cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
int line_status;
|
|
struct cs_softc *sc = ifp->if_softc;
|
|
|
|
ifmr->ifm_active = IFM_ETHER;
|
|
line_status = cs_readreg(sc, PP_LineST);
|
|
if (line_status & TENBASET_ON) {
|
|
ifmr->ifm_active |= IFM_10_T;
|
|
if (sc->chip_type != CS8900) {
|
|
if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE)
|
|
ifmr->ifm_active |= IFM_FDX;
|
|
if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE)
|
|
ifmr->ifm_active |= IFM_HDX;
|
|
}
|
|
ifmr->ifm_status = IFM_AVALID;
|
|
if (line_status & LINK_OK)
|
|
ifmr->ifm_status |= IFM_ACTIVE;
|
|
} else {
|
|
if (line_status & AUI_ON) {
|
|
cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) |
|
|
HCB1_ENBL);
|
|
if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^
|
|
(cs_readreg(sc, PP_SelfCTL) & HCB1))
|
|
ifmr->ifm_active |= IFM_10_2;
|
|
else
|
|
ifmr->ifm_active |= IFM_10_5;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
cs_mediaset(struct cs_softc *sc, int media)
|
|
{
|
|
int error;
|
|
|
|
/* Stop the receiver & transmitter */
|
|
cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) &
|
|
~(SERIAL_RX_ON | SERIAL_TX_ON));
|
|
|
|
#ifdef CS_DEBUG
|
|
if_printf(&sc->arpcom.ac_if, "cs_setmedia(%x)\n", media);
|
|
#endif
|
|
|
|
switch (IFM_SUBTYPE(media)) {
|
|
default:
|
|
case IFM_AUTO:
|
|
if ((error=enable_tp(sc))==0)
|
|
error = cs_duplex_auto(sc);
|
|
else if ((error=enable_bnc(sc)) != 0)
|
|
error = enable_aui(sc);
|
|
break;
|
|
case IFM_10_T:
|
|
if ((error=enable_tp(sc)) != 0)
|
|
break;
|
|
if (media & IFM_FDX)
|
|
cs_duplex_full(sc);
|
|
else if (media & IFM_HDX)
|
|
cs_duplex_half(sc);
|
|
else
|
|
error = cs_duplex_auto(sc);
|
|
break;
|
|
case IFM_10_2:
|
|
error = enable_bnc(sc);
|
|
break;
|
|
case IFM_10_5:
|
|
error = enable_aui(sc);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Turn the transmitter & receiver back on
|
|
*/
|
|
cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) |
|
|
SERIAL_RX_ON | SERIAL_TX_ON);
|
|
|
|
return error;
|
|
}
|