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718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
206 lines
7.2 KiB
C
206 lines
7.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _ATIIXP_H_
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#define _ATIIXP_H_
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/*
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* Constants, pretty much FreeBSD specific.
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*/
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/* Number of playback / recording channel */
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#define ATI_IXP_NPCHAN 1
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#define ATI_IXP_NRCHAN 1
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#define ATI_IXP_NCHANS (ATI_IXP_NPCHAN + ATI_IXP_NRCHAN)
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/*
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* Maximum segments/descriptors is 256, but 2 for
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* each channel should be more than enough for us.
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*/
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#define ATI_IXP_DMA_CHSEGS 2
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#define ATI_IXP_DMA_CHSEGS_MIN 2
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#define ATI_IXP_DMA_CHSEGS_MAX 256
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#define ATI_VENDOR_ID 0x1002 /* ATI Technologies */
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#define ATI_IXP_200_ID 0x4341
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#define ATI_IXP_300_ID 0x4361
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#define ATI_IXP_400_ID 0x4370
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#define ATI_IXP_SB600_ID 0x4382
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#define ATI_IXP_BASE_RATE 48000
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/*
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* Register definitions for ATI IXP
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*
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* References: ALSA snd-atiixp.c , OpenBSD/NetBSD auixp-*.h
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*/
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#define ATI_IXP_CODECS 3
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#define ATI_REG_ISR 0x00 /* interrupt source */
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#define ATI_REG_ISR_IN_XRUN (1U<<0)
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#define ATI_REG_ISR_IN_STATUS (1U<<1)
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#define ATI_REG_ISR_OUT_XRUN (1U<<2)
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#define ATI_REG_ISR_OUT_STATUS (1U<<3)
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#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
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#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
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#define ATI_REG_ISR_PHYS_INTR (1U<<8)
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#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
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#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
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#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
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#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
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#define ATI_REG_ISR_NEW_FRAME (1U<<13)
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#define ATI_REG_IER 0x04 /* interrupt enable */
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#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
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#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
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#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
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#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
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#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
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#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
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#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
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#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
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#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
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#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
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#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
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#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO) */
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#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
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#define ATI_REG_CMD 0x08 /* command */
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#define ATI_REG_CMD_POWERDOWN (1U<<0)
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#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
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#define ATI_REG_CMD_SEND_EN (1U<<2)
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#define ATI_REG_CMD_STATUS_MEM (1U<<3)
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#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
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#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
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#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
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#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
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#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
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#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
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#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
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#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
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#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
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#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
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#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
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#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
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#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
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#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
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#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
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#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
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#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
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#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
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#define ATI_REG_CMD_PACKED_DIS (1U<<24)
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#define ATI_REG_CMD_BURST_EN (1U<<25)
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#define ATI_REG_CMD_PANIC_EN (1U<<26)
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#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
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#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
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#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
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#define ATI_REG_CMD_AC_SYNC (1U<<30)
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#define ATI_REG_CMD_AC_RESET (1U<<31)
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#define ATI_REG_PHYS_OUT_ADDR 0x0c
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#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
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#define ATI_REG_PHYS_OUT_RW (1U<<2)
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#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
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#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
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#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
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#define ATI_REG_PHYS_IN_ADDR 0x10
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#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
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#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
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#define ATI_REG_PHYS_IN_DATA_SHIFT 16
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#define ATI_REG_SLOTREQ 0x14
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#define ATI_REG_COUNTER 0x18
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#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
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#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
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#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
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#define ATI_REG_IN_DMA_LINKPTR 0x20
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#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
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#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
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#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
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#define ATI_REG_IN_DMA_DT_SIZE 0x30
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#define ATI_REG_OUT_DMA_SLOT 0x34
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#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
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#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
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#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
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#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
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#define ATI_REG_OUT_DMA_LINKPTR 0x38
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#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
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#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
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#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
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#define ATI_REG_OUT_DMA_DT_SIZE 0x48
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#define ATI_REG_SPDF_CMD 0x4c
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#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
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#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
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#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
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#define ATI_REG_SPDF_DMA_LINKPTR 0x50
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#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
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#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
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#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
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#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
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#define ATI_REG_MODEM_MIRROR 0x7c
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#define ATI_REG_AUDIO_MIRROR 0x80
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#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
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#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
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#define ATI_REG_FIFO_FLUSH 0x88
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#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
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#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
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/* LINKPTR */
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#define ATI_REG_LINKPTR_EN (1U<<0)
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/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
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#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
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#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
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#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
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#define ATI_REG_DMA_STATE (7U<<26)
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#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
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/* codec detection constant indicating the interrupt flags */
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#define ALL_CODECS_NOT_READY \
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(ATI_REG_ISR_CODEC0_NOT_READY | ATI_REG_ISR_CODEC1_NOT_READY |\
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ATI_REG_ISR_CODEC2_NOT_READY)
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#define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME)
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#endif
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