Sam Leffler d212022417 Merge WIP from p4: ... o recognize ixp435 cpu o change memory layout for for ixp4xx to not assume memory is aliases to 0x10000000 (Cambria/ixp435 memory starts at zero) o handle 64 irqs for ixp435 o dual EHCI USB 2.0 controller integral to ixp435 o overhaul NPE code for ixp435 and better MAC+MII naming o updated NPE firmware (including NPE-A image for ixp435/ixp465) o Gateworks Cambria board support: - IDE compact flash - MCU - front panel LED on i2c bus - Octal LED latch Sanity-tested with NFS-root on Avila and Cambria boards. Requires pending boot2 mods for CF-boot on Cambria.		2008-12-13 01:21:37 +00:00
..
arm	Merge WIP from p4:	2008-12-13 01:21:37 +00:00
at91	- Fix spelling error in comments.	2008-12-01 10:16:25 +00:00
compile
conf	Merge WIP from p4:	2008-12-13 01:21:37 +00:00
include	Merge WIP from p4:	2008-12-13 01:21:37 +00:00
mv	Avoid confusion and adjust link address range of Marvell Orion kernel so it is	2008-12-05 15:31:51 +00:00
sa11x0	- Fix spelling error in comments.	2008-12-01 10:16:25 +00:00
xscale	Merge WIP from p4:	2008-12-13 01:21:37 +00:00