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c12c5bfbe1
ql_ioctl.c: validate the length and address of buffer passed to QL_RD_FW_DUMP Submitted by:David C Somayajulu
254 lines
5.9 KiB
C
254 lines
5.9 KiB
C
/*
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* Copyright (c) 2013-2014 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* File: ql_ioctl.c
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "ql_os.h"
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#include "ql_hw.h"
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#include "ql_def.h"
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#include "ql_inline.h"
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#include "ql_glbl.h"
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#include "ql_ioctl.h"
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static int ql_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td);
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static struct cdevsw qla_cdevsw = {
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.d_version = D_VERSION,
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.d_ioctl = ql_eioctl,
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.d_name = "qlcnic",
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};
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int
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ql_make_cdev(qla_host_t *ha)
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{
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ha->ioctl_dev = make_dev(&qla_cdevsw,
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ha->ifp->if_dunit,
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UID_ROOT,
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GID_WHEEL,
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0600,
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"%s",
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if_name(ha->ifp));
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if (ha->ioctl_dev == NULL)
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return (-1);
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ha->ioctl_dev->si_drv1 = ha;
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return (0);
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}
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void
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ql_del_cdev(qla_host_t *ha)
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{
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if (ha->ioctl_dev != NULL)
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destroy_dev(ha->ioctl_dev);
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return;
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}
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static int
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ql_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td)
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{
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qla_host_t *ha;
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int rval = 0;
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device_t pci_dev;
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struct ifnet *ifp;
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q80_offchip_mem_val_t val;
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qla_rd_pci_ids_t *pci_ids;
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qla_rd_fw_dump_t *fw_dump;
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union {
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qla_reg_val_t *rv;
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qla_rd_flash_t *rdf;
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qla_wr_flash_t *wrf;
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qla_erase_flash_t *erf;
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qla_offchip_mem_val_t *mem;
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} u;
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if ((ha = (qla_host_t *)dev->si_drv1) == NULL)
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return ENXIO;
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pci_dev= ha->pci_dev;
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switch(cmd) {
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case QLA_RDWR_REG:
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u.rv = (qla_reg_val_t *)data;
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if (u.rv->direct) {
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if (u.rv->rd) {
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u.rv->val = READ_REG32(ha, u.rv->reg);
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} else {
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WRITE_REG32(ha, u.rv->reg, u.rv->val);
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}
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} else {
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if ((rval = ql_rdwr_indreg32(ha, u.rv->reg, &u.rv->val,
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u.rv->rd)))
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rval = ENXIO;
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}
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break;
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case QLA_RD_FLASH:
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if (!ha->hw.flags.fdt_valid) {
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rval = EIO;
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break;
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}
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u.rdf = (qla_rd_flash_t *)data;
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if ((rval = ql_rd_flash32(ha, u.rdf->off, &u.rdf->data)))
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rval = ENXIO;
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break;
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case QLA_WR_FLASH:
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ifp = ha->ifp;
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if (ifp == NULL) {
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rval = ENXIO;
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break;
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}
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if (ifp->if_drv_flags & (IFF_DRV_OACTIVE | IFF_DRV_RUNNING)) {
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rval = ENXIO;
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break;
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}
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if (!ha->hw.flags.fdt_valid) {
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rval = EIO;
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break;
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}
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u.wrf = (qla_wr_flash_t *)data;
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if ((rval = ql_wr_flash_buffer(ha, u.wrf->off, u.wrf->size,
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u.wrf->buffer))) {
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printf("flash write failed[%d]\n", rval);
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rval = ENXIO;
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}
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break;
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case QLA_ERASE_FLASH:
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ifp = ha->ifp;
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if (ifp == NULL) {
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rval = ENXIO;
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break;
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}
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if (ifp->if_drv_flags & (IFF_DRV_OACTIVE | IFF_DRV_RUNNING)) {
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rval = ENXIO;
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break;
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}
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if (!ha->hw.flags.fdt_valid) {
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rval = EIO;
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break;
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}
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u.erf = (qla_erase_flash_t *)data;
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if ((rval = ql_erase_flash(ha, u.erf->off,
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u.erf->size))) {
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printf("flash erase failed[%d]\n", rval);
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rval = ENXIO;
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}
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break;
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case QLA_RDWR_MS_MEM:
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u.mem = (qla_offchip_mem_val_t *)data;
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if ((rval = ql_rdwr_offchip_mem(ha, u.mem->off, &val,
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u.mem->rd)))
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rval = ENXIO;
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else {
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u.mem->data_lo = val.data_lo;
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u.mem->data_hi = val.data_hi;
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u.mem->data_ulo = val.data_ulo;
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u.mem->data_uhi = val.data_uhi;
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}
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break;
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case QLA_RD_FW_DUMP_SIZE:
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if (ha->hw.mdump_init == 0) {
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rval = EINVAL;
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break;
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}
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fw_dump = (qla_rd_fw_dump_t *)data;
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fw_dump->template_size = ha->hw.dma_buf.minidump.size;
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fw_dump->pci_func = ha->pci_func;
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break;
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case QLA_RD_FW_DUMP:
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if (ha->hw.mdump_init == 0) {
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rval = EINVAL;
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break;
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}
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fw_dump = (qla_rd_fw_dump_t *)data;
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if ((fw_dump->md_template == NULL) ||
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(fw_dump->template_size != ha->hw.dma_buf.minidump.size)) {
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rval = EINVAL;
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break;
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}
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if ((rval = copyout(ha->hw.dma_buf.minidump.dma_b,
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fw_dump->md_template, fw_dump->template_size)))
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rval = ENXIO;
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break;
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case QLA_RD_PCI_IDS:
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pci_ids = (qla_rd_pci_ids_t *)data;
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pci_ids->ven_id = pci_get_vendor(pci_dev);
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pci_ids->dev_id = pci_get_device(pci_dev);
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pci_ids->subsys_ven_id = pci_get_subvendor(pci_dev);
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pci_ids->subsys_dev_id = pci_get_subdevice(pci_dev);
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pci_ids->rev_id = pci_read_config(pci_dev, PCIR_REVID, 1);
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break;
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default:
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break;
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}
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return rval;
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}
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