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0bc7cf6fde
for 3200 and 8200 series cards. Submitted by: David C Somayajulu (david.somayajulu@qlogic.com), Qlogic Corporation MFC After: 3 days
230 lines
5.4 KiB
C
230 lines
5.4 KiB
C
/*
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* Copyright (c) 2010-2011 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* File: qla_inline.h
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#ifndef _QLA_INLINE_H_
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#define _QLA_INLINE_H_
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/*
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* Function: qla_hw_reset
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*/
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static __inline void qla_hw_reset(qla_host_t *ha)
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{
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WRITE_OFFSET32(ha, Q8_ASIC_RESET, 0xFFFFFFFF);
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}
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#define QL8_SEMLOCK_TIMEOUT 1000/* QLA8020 Semaphore Lock Timeout 10ms */
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/*
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* Inline functions for hardware semaphores
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*/
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/*
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* Name: qla_sem_lock
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* Function: Locks one of the semaphore registers (semaphore 2,3,5 & 7)
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* If the id_reg is valid, then id_val is written into it.
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* This is for debugging purpose
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* Returns: 0 on success; otherwise its failed.
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*/
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static __inline int
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qla_sem_lock(qla_host_t *ha, uint32_t sem_reg, uint32_t id_reg, uint32_t id_val)
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{
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int count = QL8_SEMLOCK_TIMEOUT;
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while (count) {
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if ((READ_REG32(ha, sem_reg) & SEM_LOCK_BIT))
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break;
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count--;
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if (!count)
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return(-1);
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qla_mdelay(__func__, 10);
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}
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if (id_reg)
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WRITE_OFFSET32(ha, id_reg, id_val);
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return(0);
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}
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/*
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* Name: qla_sem_unlock
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* Function: Unlocks the semaphore registers (semaphore 2,3,5 & 7)
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* previously locked by qla_sem_lock()
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*/
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static __inline void
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qla_sem_unlock(qla_host_t *ha, uint32_t sem_reg)
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{
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READ_REG32(ha, sem_reg);
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}
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static __inline int
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qla_get_ifq_snd_maxlen(qla_host_t *ha)
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{
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return((NUM_TX_DESCRIPTORS - 1));
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}
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static __inline uint32_t
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qla_get_optics(qla_host_t *ha)
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{
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uint32_t link_speed;
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link_speed = READ_REG32(ha, Q8_LINK_SPEED_0);
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if (ha->pci_func == 0)
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link_speed = link_speed & 0xFF;
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else
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link_speed = (link_speed >> 8) & 0xFF;
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switch (link_speed) {
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case 0x1:
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link_speed = IFM_100_FX;
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break;
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case 0x10:
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link_speed = IFM_1000_SX;
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break;
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default:
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link_speed = (IFM_10G_LR | IFM_10G_SR);
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break;
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}
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return(link_speed);
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}
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static __inline uint8_t *
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qla_get_mac_addr(qla_host_t *ha)
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{
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return (ha->hw.mac_addr);
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}
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static __inline void
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qla_read_mac_addr(qla_host_t *ha)
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{
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uint32_t mac_crb_addr;
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uint32_t mac_lo;
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uint32_t mac_hi;
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uint8_t *macp;
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mac_crb_addr = Q8_CRB_MAC_BLOCK_START +
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(((ha->pci_func >> 1) * 3) << 2) + ((ha->pci_func & 0x01) << 2);
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mac_lo = READ_REG32(ha, mac_crb_addr);
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mac_hi = READ_REG32(ha, (mac_crb_addr + 0x4));
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if (ha->pci_func & 0x01) {
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mac_lo = mac_lo >> 16;
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macp = (uint8_t *)&mac_lo;
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ha->hw.mac_addr[5] = macp[0];
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ha->hw.mac_addr[4] = macp[1];
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macp = (uint8_t *)&mac_hi;
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ha->hw.mac_addr[3] = macp[0];
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ha->hw.mac_addr[2] = macp[1];
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ha->hw.mac_addr[1] = macp[2];
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ha->hw.mac_addr[0] = macp[3];
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} else {
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macp = (uint8_t *)&mac_lo;
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ha->hw.mac_addr[5] = macp[0];
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ha->hw.mac_addr[4] = macp[1];
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ha->hw.mac_addr[3] = macp[2];
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ha->hw.mac_addr[2] = macp[3];
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macp = (uint8_t *)&mac_hi;
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ha->hw.mac_addr[1] = macp[0];
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ha->hw.mac_addr[0] = macp[1];
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}
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return;
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}
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static __inline void
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qla_set_hw_rcv_desc(qla_host_t *ha, uint32_t ridx, uint32_t index,
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uint32_t handle, bus_addr_t paddr, uint32_t buf_size)
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{
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q80_recv_desc_t *rcv_desc;
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rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[ridx].dma_b;
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rcv_desc += index;
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rcv_desc->handle = (uint16_t)handle;
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rcv_desc->buf_size = buf_size;
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rcv_desc->buf_addr = paddr;
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return;
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}
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static __inline void
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qla_init_hw_rcv_descriptors(qla_host_t *ha, uint32_t ridx)
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{
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if (ridx == RDS_RING_INDEX_NORMAL)
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bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,
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(sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS));
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else if (ridx == RDS_RING_INDEX_JUMBO)
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bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,
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(sizeof(q80_recv_desc_t) * NUM_RX_JUMBO_DESCRIPTORS));
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else
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QL_ASSERT(0, ("%s: invalid rds index [%d]\n", __func__, ridx));
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}
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static __inline void
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qla_lock(qla_host_t *ha, const char *str)
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{
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while (1) {
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mtx_lock(&ha->hw_lock);
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if (!ha->hw_lock_held) {
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ha->hw_lock_held = 1;
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ha->qla_lock = str;
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mtx_unlock(&ha->hw_lock);
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break;
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}
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mtx_unlock(&ha->hw_lock);
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qla_mdelay(__func__, 1);
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}
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return;
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}
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static __inline void
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qla_unlock(qla_host_t *ha, const char *str)
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{
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mtx_lock(&ha->hw_lock);
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ha->hw_lock_held = 0;
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ha->qla_unlock = str;
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mtx_unlock(&ha->hw_lock);
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}
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#endif /* #ifndef _QLA_INLINE_H_ */
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