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164 lines
5.8 KiB
Plaintext
164 lines
5.8 KiB
Plaintext
2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
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* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3
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and athlon64-sse3 as improved versions of k8, opteron and athlon64
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with SSE3 instruction set support.
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* doc/invoke.texi: Likewise.
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2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639)
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* config/i386/i386.c (ix86_handle_option): Handle SSSE3.
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2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726)
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* config/i386/xmmintrin.h: Make inclusion of emmintrin.h
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conditional to __SSE2__.
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(Entries below should have been added to first ChangeLog
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entry for amdfam10 dated 2007-02-05)
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* config/i386/emmintrin.h: Generate #error if __SSE2__ is not
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defined.
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* config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
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defined.
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* config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
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defined.
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2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687)
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* config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
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2007-01-17 Eric Christopher <echristo@apple.com> (r120846)
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* config.gcc: Support core2 processor.
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2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial)
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PR target/30040
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* config/i386/driver-i386.c (bit_SSSE3): New.
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2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973)
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* doc/invoke.texi (core2): Add item.
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* config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
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macros.
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(TARGET_CPU_CPP_BUILTINS): Add code for core2.
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(TARGET_CPU_DEFAULT_generic): Change value.
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(TARGET_CPU_DEFAULT_NAMES): Add core2.
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(processor_type): Add new constant PROCESSOR_CORE2.
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* config/i386/i386.md (cpu): Add core2.
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* config/i386/i386.c (core2_cost): New initialized variable.
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(m_CORE2): New macro.
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(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
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x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop,
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x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8,
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x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves,
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x86_partial_reg_dependency, x86_memory_mismatch_stall,
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x86_accumulate_outgoing_args, x86_prologue_using_move,
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x86_epilogue_using_move, x86_arch_always_fancy_math_387,
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x86_sse_partial_reg_dependency, x86_rep_movl_optimal,
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x86_use_incdec, x86_four_jump_limit, x86_schedule,
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x86_pad_returns): Add m_CORE2.
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(override_options): Add entries for Core2.
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(ix86_issue_rate): Add case for Core2.
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2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090)
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* config/i386/i386.h (TARGET_GEODE):
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(TARGET_CPU_CPP_BUILTINS): Add code for geode.
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(TARGET_CPU_DEFAULT_geode): New macro.
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(TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2,
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TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon,
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TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8,
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TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott,
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TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase
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the macro values.
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(TARGET_CPU_DEFAULT_NAMES): Add geode.
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(processor_type): Add PROCESSOR_GEODE.
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* config/i386/i386.md: Include geode.md.
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(cpu): Add geode.
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* config/i386/i386.c (geode_cost): New initialized global
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variable.
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(m_GEODE, m_K6_GEODE): New macros.
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(x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf,
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x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4,
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x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants,
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x86_schedule): Use m_K6_GEODE instead of m_K6.
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(x86_movx, x86_cmove): Set up m_GEODE.
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(x86_integer_DFmode_moves): Clear m_GEODE.
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(processor_target_table): Add entry for geode.
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(processor_alias_table): Ditto.
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* config/i386/geode.md: New file.
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* doc/invoke.texi: Add entry about geode processor.
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2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958)
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* config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers.
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(x86_64-*-*): Likewise.
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* config/i386/i386.c (pta_flags): Add PTA_SSSE3.
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(override_options): Check SSSE3.
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(ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD,
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IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD,
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IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW,
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IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB,
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IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND,
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IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW,
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IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128,
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IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128,
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IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128,
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IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128,
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IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128,
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IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128,
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IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128,
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IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and
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IX86_BUILTIN_PABSD128.
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(bdesc_2arg): Add SSSE3.
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(bdesc_1arg): Likewise.
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(ix86_init_mmx_sse_builtins): Support SSSE3.
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(ix86_expand_builtin): Likewise.
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* config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise.
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* config/i386/i386.md (UNSPEC_PSHUFB): New.
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(UNSPEC_PSIGN): Likewise.
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(UNSPEC_PALIGNR): Likewise.
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Include mmx.md before sse.md.
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* config/i386/i386.opt: Add -mssse3.
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* config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3.
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(ssse3_phaddwv4hi3): Likewise.
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(ssse3_phadddv4si3): Likewise.
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(ssse3_phadddv2si3): Likewise.
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(ssse3_phaddswv8hi3): Likewise.
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(ssse3_phaddswv4hi3): Likewise.
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(ssse3_phsubwv8hi3): Likewise.
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(ssse3_phsubwv4hi3): Likewise.
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(ssse3_phsubdv4si3): Likewise.
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(ssse3_phsubdv2si3): Likewise.
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(ssse3_phsubswv8hi3): Likewise.
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(ssse3_phsubswv4hi3): Likewise.
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(ssse3_pmaddubswv8hi3): Likewise.
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(ssse3_pmaddubswv4hi3): Likewise.
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(ssse3_pmulhrswv8hi3): Likewise.
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(ssse3_pmulhrswv4hi3): Likewise.
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(ssse3_pshufbv16qi3): Likewise.
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(ssse3_pshufbv8qi3): Likewise.
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(ssse3_psign<mode>3): Likewise.
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(ssse3_psign<mode>3): Likewise.
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(ssse3_palignrti): Likewise.
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(ssse3_palignrdi): Likewise.
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(abs<mode>2): Likewise.
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(abs<mode>2): Likewise.
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* config/i386/tmmintrin.h: New file.
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* doc/extend.texi: Document SSSE3 built-in functions.
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* doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
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