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dc15bc80b7
armv6/7 systems. We need to use some new armv6/7 features at startup and splitting the implemenations to separate files will be more maintainable than adding even more #ifdef sections to locore.S. Because of the standardized interfaces to cache and MMU operations in armv7, we can tolerate the kernel being entered with caches enabled. This allows running u-boot and loader(8) with caches enabled, and the performance improvement can be dramatic (boot times can be cut from over a minute to under 30 seconds). The new implementation also has more robust cache and mmu sequences for launching AP cores, and it paves the way for upcoming changes to the pmap code which will use the TEX remap feature. Changes in mp_machdep.c work with the new behavior in locore-v6 mp_entry, and also reuse the original boot-time page tables to get transitioned from physical to virtual addressing before installing the normal tables. Submitted by Svatopluk Kraus and Michal Meloun with some changes by me. |
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allwinner | ||
altera/socfpga | ||
arm | ||
at91 | ||
broadcom/bcm2835 | ||
cavium/cns11xx | ||
conf | ||
freescale | ||
include | ||
lpc | ||
mv | ||
rockchip | ||
samsung | ||
ti | ||
versatile | ||
xilinx | ||
xscale |