mirror of
https://git.FreeBSD.org/src.git
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dec1abaec3
This is a work in progress; bringing the interface down stops further use. It only happens on RT5350/MT7620. This is based on work by Alexander A. Mityaev <sansan@adm.ua>. Submitted by: Stanislav Galabov <galabov@gmail.com>
304 lines
8.2 KiB
C
304 lines
8.2 KiB
C
/*-
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* Copyright (c) 2010-2011 Aleksandr Rybalko <ray@ddteam.net>
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* Copyright (c) 2009-2010 Alexander Egorenkov <egorenar@gmail.com>
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* Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_RTVAR_H_
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#define _IF_RTVAR_H_
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <sys/sockio.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/taskqueue.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/bpf.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include "opt_if_rt.h"
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#define RT_SOFTC_LOCK(sc) mtx_lock(&(sc)->lock)
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#define RT_SOFTC_UNLOCK(sc) mtx_unlock(&(sc)->lock)
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#define RT_SOFTC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED)
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#define RT_SOFTC_TX_RING_LOCK(ring) mtx_lock(&(ring)->lock)
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#define RT_SOFTC_TX_RING_UNLOCK(ring) mtx_unlock(&(ring)->lock)
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#define RT_SOFTC_TX_RING_ASSERT_LOCKED(ring) \
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mtx_assert(&(ring)->lock, MA_OWNED)
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#define RT_SOFTC_TX_RING_COUNT 4
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#define RT_SOFTC_RX_RING_COUNT 4
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#ifndef IF_RT_RING_DATA_COUNT
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#define IF_RT_RING_DATA_COUNT 128
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#endif
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#define RT_SOFTC_RX_RING_DATA_COUNT IF_RT_RING_DATA_COUNT
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#define RT_SOFTC_MAX_SCATTER 10
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#define RT_SOFTC_TX_RING_DATA_COUNT (IF_RT_RING_DATA_COUNT/4)
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#define RT_SOFTC_TX_RING_DESC_COUNT \
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(RT_SOFTC_TX_RING_DATA_COUNT * RT_SOFTC_MAX_SCATTER)
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#define RT_TXDESC_SDL1_BURST (1 << 15)
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#define RT_TXDESC_SDL1_LASTSEG (1 << 14)
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#define RT_TXDESC_SDL0_DDONE (1 << 15)
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#define RT_TXDESC_SDL0_LASTSEG (1 << 14)
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struct rt_txdesc
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{
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uint32_t sdp0;
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uint16_t sdl1;
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uint16_t sdl0;
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uint32_t sdp1;
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uint8_t vid;
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#define TXDSCR_INS_VLAN_TAG 0x80
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#define TXDSCR_VLAN_PRIO_MASK 0x70
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#define TXDSCR_VLAN_IDX_MASK 0x0f
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uint8_t pppoe;
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#define TXDSCR_USR_DEF_FLD 0x80
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#define TXDSCR_INS_PPPOE_HDR 0x10
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#define TXDSCR_PPPOE_SID_MASK 0x0f
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uint8_t qn;
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#define TXDSCR_QUEUE_MASK 0x07
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uint8_t dst;
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#define TXDSCR_IP_CSUM_GEN 0x80
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#define TXDSCR_UDP_CSUM_GEN 0x40
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#define TXDSCR_TCP_CSUM_GEN 0x20
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#define TXDSCR_DST_PORT_MASK 0x07
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#define TXDSCR_DST_PORT_CPU 0x00
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#define TXDSCR_DST_PORT_GDMA1 0x01
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#define TXDSCR_DST_PORT_GDMA2 0x02
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#define TXDSCR_DST_PORT_PPE 0x06
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#define TXDSCR_DST_PORT_DISC 0x07
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} __packed;
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#define RT_RXDESC_SDL0_DDONE (1 << 15)
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struct rt_rxdesc
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{
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uint32_t sdp0;
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uint16_t sdl1;
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uint16_t sdl0;
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uint32_t sdp1;
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uint16_t foe;
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#define RXDSXR_FOE_ENTRY_VALID 0x40
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#define RXDSXR_FOE_ENTRY_MASK 0x3f
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uint8_t ai;
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#define RXDSXR_AI_COU_REASON 0xff
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#define RXDSXR_AI_PARSER_RSLT_MASK 0xff
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uint8_t src;
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#define RXDSXR_SRC_IPFVLD 0x80
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#define RXDSXR_SRC_L4FVLD 0x40
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#define RXDSXR_SRC_IP_CSUM_FAIL 0x20
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#define RXDSXR_SRC_L4_CSUM_FAIL 0x10
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#define RXDSXR_SRC_AIS 0x08
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#define RXDSXR_SRC_PORT_MASK 0x07
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} __packed;
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struct rt_softc_rx_data
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{
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bus_dmamap_t dma_map;
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struct mbuf *m;
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};
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struct rt_softc_rx_ring
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{
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bus_dma_tag_t desc_dma_tag;
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bus_dmamap_t desc_dma_map;
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bus_addr_t desc_phys_addr;
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struct rt_rxdesc *desc;
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bus_dma_tag_t data_dma_tag;
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bus_dmamap_t spare_dma_map;
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struct rt_softc_rx_data data[RT_SOFTC_RX_RING_DATA_COUNT];
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int cur;
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int qid;
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};
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struct rt_softc_tx_data
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{
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bus_dmamap_t dma_map;
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struct mbuf *m;
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};
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struct rt_softc_tx_ring
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{
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struct mtx lock;
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bus_dma_tag_t desc_dma_tag;
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bus_dmamap_t desc_dma_map;
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bus_addr_t desc_phys_addr;
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struct rt_txdesc *desc;
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int desc_queued;
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int desc_cur;
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int desc_next;
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bus_dma_tag_t seg0_dma_tag;
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bus_dmamap_t seg0_dma_map;
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bus_addr_t seg0_phys_addr;
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uint8_t *seg0;
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bus_dma_tag_t data_dma_tag;
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struct rt_softc_tx_data data[RT_SOFTC_TX_RING_DATA_COUNT];
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int data_queued;
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int data_cur;
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int data_next;
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int qid;
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};
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struct rt_softc
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{
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device_t dev;
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struct mtx lock;
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uint32_t flags;
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int mem_rid;
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struct resource *mem;
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int irq_rid;
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struct resource *irq;
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void *irqh;
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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struct ifnet *ifp;
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int if_flags;
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struct ifmedia rt_ifmedia;
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uint32_t mac_rev;
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uint8_t mac_addr[ETHER_ADDR_LEN];
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device_t rt_miibus;
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uint32_t intr_enable_mask;
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uint32_t intr_disable_mask;
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uint32_t intr_pending_mask;
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struct task rx_done_task;
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int rx_process_limit;
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struct task tx_done_task;
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struct task periodic_task;
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struct callout periodic_ch;
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unsigned long periodic_round;
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struct taskqueue *taskqueue;
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struct rt_softc_rx_ring rx_ring[RT_SOFTC_RX_RING_COUNT];
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struct rt_softc_tx_ring tx_ring[RT_SOFTC_TX_RING_COUNT];
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int tx_ring_mgtqid;
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struct callout tx_watchdog_ch;
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int tx_timer;
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/* statistic counters */
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unsigned long interrupts;
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unsigned long tx_coherent_interrupts;
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unsigned long rx_coherent_interrupts;
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unsigned long rx_interrupts[RT_SOFTC_RX_RING_COUNT];
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unsigned long rx_delay_interrupts;
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unsigned long tx_interrupts[RT_SOFTC_TX_RING_COUNT];
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unsigned long tx_delay_interrupts;
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unsigned long tx_data_queue_full[RT_SOFTC_TX_RING_COUNT];
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unsigned long tx_watchdog_timeouts;
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unsigned long tx_defrag_packets;
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unsigned long no_tx_desc_avail;
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unsigned long rx_mbuf_alloc_errors;
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unsigned long rx_mbuf_dmamap_errors;
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unsigned long tx_queue_not_empty[2];
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unsigned long rx_bytes;
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unsigned long rx_packets;
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unsigned long rx_crc_err;
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unsigned long rx_phy_err;
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unsigned long rx_dup_packets;
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unsigned long rx_fifo_overflows;
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unsigned long rx_short_err;
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unsigned long rx_long_err;
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unsigned long tx_bytes;
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unsigned long tx_packets;
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unsigned long tx_skip;
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unsigned long tx_collision;
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int phy_addr;
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#ifdef IF_RT_DEBUG
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int debug;
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#endif
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uint32_t rt_chipid;
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/* chip specific registers config */
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int rx_ring_count;
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uint32_t int_rx_done_mask;
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uint32_t int_tx_done_mask;
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uint32_t delay_int_cfg;
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uint32_t fe_int_status;
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uint32_t fe_int_enable;
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uint32_t pdma_glo_cfg;
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uint32_t pdma_rst_idx;
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uint32_t tx_base_ptr[RT_SOFTC_TX_RING_COUNT];
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uint32_t tx_max_cnt[RT_SOFTC_TX_RING_COUNT];
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uint32_t tx_ctx_idx[RT_SOFTC_TX_RING_COUNT];
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uint32_t tx_dtx_idx[RT_SOFTC_TX_RING_COUNT];
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uint32_t rx_base_ptr[RT_SOFTC_RX_RING_COUNT];
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uint32_t rx_max_cnt[RT_SOFTC_RX_RING_COUNT];
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uint32_t rx_calc_idx[RT_SOFTC_RX_RING_COUNT];
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uint32_t rx_drx_idx[RT_SOFTC_RX_RING_COUNT];
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};
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#ifdef IF_RT_DEBUG
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enum
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{
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RT_DEBUG_RX = 0x00000001,
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RT_DEBUG_TX = 0x00000002,
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RT_DEBUG_INTR = 0x00000004,
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RT_DEBUG_STATE = 0x00000008,
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RT_DEBUG_STATS = 0x00000010,
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RT_DEBUG_PERIODIC = 0x00000020,
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RT_DEBUG_WATCHDOG = 0x00000040,
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RT_DEBUG_ANY = 0xffffffff
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};
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#define RT_DPRINTF(sc, m, fmt, ...) \
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do { if ((sc)->debug & (m)) \
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device_printf(sc->dev, fmt, ## __VA_ARGS__); } while (0)
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#else
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#define RT_DPRINTF(sc, m, fmt, ...)
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#endif /* #ifdef IF_RT_DEBUG */
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#endif /* #ifndef _IF_RTVAR_H_ */
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