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8dee0fd04c
r235162: Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250 board. Peripherals currently supported: - Serial ports - Interrupt controller - Timers - Ethernet - USB host - Framebuffer (in conjunction with SSD1289 LCD controller) - RTC - SPI - GPIO Submitted by: Jakub Wojciech Klama <jceel@freebsd.org>
210 lines
5.7 KiB
C
210 lines
5.7 KiB
C
/*-
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* Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <dev/spibus/spi.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/lpc/lpcreg.h>
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#include <arm/lpc/lpcvar.h>
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#include "spibus_if.h"
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struct ssd1289_softc
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{
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device_t ss_dev;
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};
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static int ssd1289_probe(device_t);
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static int ssd1289_attach(device_t);
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static __inline void ssd1289_set_dc(struct ssd1289_softc *, int);
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static __inline void ssd1289_spi_send(struct ssd1289_softc *, uint8_t *, int);
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static void ssd1289_write_reg(struct ssd1289_softc *, uint16_t, uint16_t);
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static struct ssd1289_softc *ssd1289_sc = NULL;
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void ssd1289_configure(void);
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static int
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ssd1289_probe(device_t dev)
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{
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#if 0
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if (!ofw_bus_is_compatible(dev, "ssd1289"))
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return (ENXIO);
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#endif
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device_set_desc(dev, "Solomon Systech SSD1289 LCD controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ssd1289_attach(device_t dev)
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{
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struct ssd1289_softc *sc = device_get_softc(dev);
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sc->ss_dev = dev;
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ssd1289_sc = sc;
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return (0);
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}
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void
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ssd1289_configure(void)
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{
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struct ssd1289_softc *sc = ssd1289_sc;
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/* XXX will be replaced with commented code */
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ssd1289_write_reg(sc,0x00,0x0001);
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DELAY(20);
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ssd1289_write_reg(sc,0x03,0xA2A4);
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ssd1289_write_reg(sc,0x0C,0x0004);
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ssd1289_write_reg(sc,0x0D,0x0308);
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ssd1289_write_reg(sc,0x0E,0x3000);
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DELAY(50);
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ssd1289_write_reg(sc,0x1E,0x00AF);
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ssd1289_write_reg(sc,0x01,0x2B3F);
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ssd1289_write_reg(sc,0x02,0x0600);
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ssd1289_write_reg(sc,0x10,0x0000);
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ssd1289_write_reg(sc,0x07,0x0233);
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ssd1289_write_reg(sc,0x0B,0x0039);
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ssd1289_write_reg(sc,0x0F,0x0000);
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DELAY(50);
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ssd1289_write_reg(sc,0x30,0x0707);
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ssd1289_write_reg(sc,0x31,0x0204);
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ssd1289_write_reg(sc,0x32,0x0204);
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ssd1289_write_reg(sc,0x33,0x0502);
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ssd1289_write_reg(sc,0x34,0x0507);
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ssd1289_write_reg(sc,0x35,0x0204);
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ssd1289_write_reg(sc,0x36,0x0204);
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ssd1289_write_reg(sc,0x37,0x0502);
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ssd1289_write_reg(sc,0x3A,0x0302);
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ssd1289_write_reg(sc,0x3B,0x0302);
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ssd1289_write_reg(sc,0x23,0x0000);
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ssd1289_write_reg(sc,0x24,0x0000);
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ssd1289_write_reg(sc,0x48,0x0000);
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ssd1289_write_reg(sc,0x49,0x013F);
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ssd1289_write_reg(sc,0x4A,0x0000);
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ssd1289_write_reg(sc,0x4B,0x0000);
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ssd1289_write_reg(sc,0x41,0x0000);
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ssd1289_write_reg(sc,0x42,0x0000);
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ssd1289_write_reg(sc,0x44,0xEF00);
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ssd1289_write_reg(sc,0x45,0x0000);
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ssd1289_write_reg(sc,0x46,0x013F);
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DELAY(50);
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ssd1289_write_reg(sc,0x44,0xEF00);
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ssd1289_write_reg(sc,0x45,0x0000);
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ssd1289_write_reg(sc,0x4E,0x0000);
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ssd1289_write_reg(sc,0x4F,0x0000);
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ssd1289_write_reg(sc,0x46,0x013F);
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}
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static __inline void
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ssd1289_spi_send(struct ssd1289_softc *sc, uint8_t *data, int len)
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{
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struct spi_command cmd;
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uint8_t buffer[8];
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cmd.tx_cmd = data;
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cmd.tx_cmd_sz = len;
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cmd.rx_cmd = buffer;
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cmd.rx_cmd_sz = len;
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cmd.tx_data_sz = 0;
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cmd.rx_data_sz = 0;
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SPIBUS_TRANSFER(device_get_parent(sc->ss_dev), sc->ss_dev, &cmd);
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}
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static __inline void
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ssd1289_set_dc(struct ssd1289_softc *sc, int value)
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{
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lpc_gpio_set_state(sc->ss_dev, SSD1289_DC_PIN, value);
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}
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static void
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ssd1289_write_reg(struct ssd1289_softc *sc, uint16_t addr, uint16_t value)
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{
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uint8_t buffer[2];
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ssd1289_set_dc(sc, 0);
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buffer[0] = 0x00;
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buffer[1] = addr & 0xff;
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ssd1289_spi_send(sc, buffer, 2);
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ssd1289_set_dc(sc, 1);
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buffer[0] = (value >> 8) & 0xff;
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buffer[1] = value & 0xff;
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ssd1289_spi_send(sc, buffer, 2);
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}
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static device_method_t ssd1289_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ssd1289_probe),
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DEVMETHOD(device_attach, ssd1289_attach),
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{ 0, 0 }
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};
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static devclass_t ssd1289_devclass;
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static driver_t ssd1289_driver = {
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"ssd1289",
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ssd1289_methods,
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sizeof(struct ssd1289_softc),
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};
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DRIVER_MODULE(ssd1289, spibus, ssd1289_driver, ssd1289_devclass, 0, 0);
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