Marcel Moolenaar d5b3a507de Lower VM_MAX_KERNEL_ADDRESS to 0xf8000000. We actually have ... devices below CCSRBAR_VA, which overlap with KVA if that's out limit.		2009-04-21 17:08:02 +00:00
..
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
altivec.h	Add Altivec support for supported CPUs. This is derived from the FPU support	2009-02-20 17:48:40 +00:00
asm.h
atomic.h	Unbreak previous commit.	2008-11-22 22:15:34 +00:00
bat.h
bootinfo.h
bus_dma.h
bus.h
clock.h
cpu.h
cpufunc.h
db_machdep.h
dbdma.h
elf.h	Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointer	2009-03-17 12:50:16 +00:00
endian.h
exec.h
float.h
floatingpoint.h
fpu.h
frame.h	Make Book-E debug register state part of the PCB context.	2009-02-27 12:08:24 +00:00
gdb_machdep.h
hid.h	Rework the way we get the cacheline size. Instead of having a table of	2009-04-12 03:03:55 +00:00
ieee.h
ieeefp.h
in_cksum.h
intr_machdep.h
intr.h	First round of cleanups. There's a lot of NetBSDism in this header.	2009-04-04 22:03:19 +00:00
kdb.h
limits.h
md_var.h	Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode	2009-04-04 00:22:44 +00:00
memdev.h
metadata.h
mmuvar.h
mutex.h
ocpbus.h
ofw_machdep.h	Modularize the Open Firmware client interface to allow run-time switching	2008-12-20 00:33:10 +00:00
openpicreg.h
openpicvar.h
param.h	Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing	2009-04-20 12:59:23 +00:00
pcb.h	Make Book-E debug register state part of the PCB context.	2009-02-27 12:08:24 +00:00
pcpu.h	Add Altivec support for supported CPUs. This is derived from the FPU support	2009-02-20 17:48:40 +00:00
pio.h
pmap.h	PowerPC, meet kernel core dumps. The support is based	2009-04-04 02:12:37 +00:00
pmc_mdep.h
powerpc.h
proc.h
profile.h
psl.h
pte.h	Rework BookE pmap towards multi-core support.	2009-01-13 15:41:58 +00:00
ptrace.h
reg.h
reloc.h
resource.h
runq.h
sc_machdep.h
setjmp.h
sf_buf.h	Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode	2009-04-04 00:22:44 +00:00
sigframe.h
signal.h
smp.h
spr.h	Rework the way we get the cacheline size. Instead of having a table of	2009-04-12 03:03:55 +00:00
sr.h
stack.h
stdarg.h
sysarch.h	Add sysarch.h. It's included by drm(4).	2009-04-04 22:05:36 +00:00
tlb.h	Rework BookE pmap towards multi-core support.	2009-01-13 15:41:58 +00:00
trap_aim.h	Fix a typo in the SRR1 comparison for program exceptions. While here,	2009-04-19 06:30:00 +00:00
trap_booke.h
trap.h
ucontext.h
varargs.h
vmparam.h	Lower VM_MAX_KERNEL_ADDRESS to 0xf8000000. We actually have	2009-04-21 17:08:02 +00:00